From: Pu Wen <puwen@hygon.cn>
To: Joerg Roedel <jroedel@suse.de>
Cc: Sean Christopherson <seanjc@google.com>, <x86@kernel.org>,
<joro@8bytes.org>, <thomas.lendacky@amd.com>,
<dave.hansen@linux.intel.com>, <peterz@infradead.org>,
<tglx@linutronix.de>, <mingo@redhat.com>, <bp@suse.de>,
<hpa@zytor.com>, <sashal@kernel.org>,
<gregkh@linuxfoundation.org>, <linux-kernel@vger.kernel.org>,
<kvm@vger.kernel.org>, <stable@vger.kernel.org>
Subject: Re: [PATCH] x86/sev: Check whether SEV or SME is supported first
Date: Mon, 31 May 2021 22:56:50 +0800 [thread overview]
Message-ID: <e1ad087e-a951-4128-923e-867a8b38ecec@hygon.cn> (raw)
In-Reply-To: <YLSuRBzM6piigP8t@suse.de>
On 2021/5/31 17:37, Joerg Roedel wrote:
> On Thu, May 27, 2021 at 11:08:32PM +0800, Pu Wen wrote:
>> Reading MSR_AMD64_SEV which is not implemented on Hygon Dhyana CPU will cause
>> the kernel reboot, and native_read_msr_safe() has no help.
>
> The reason for the reboot is that there is no #GP or #DF handler set up
> when this MSR is read, so its propagated to a shutdown event. But there
> is an IDT already, so you can set up early and #GP handler to fix the
> reboot.
Thanks for your suggestion, I'll try to set up early #GP handler to fix
the problem.
--
Regards,
Pu Wen
next prev parent reply other threads:[~2021-05-31 16:56 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-26 7:24 [PATCH] x86/sev: Check whether SEV or SME is supported first Pu Wen
2021-05-26 17:27 ` Sean Christopherson
2021-05-27 15:08 ` Pu Wen
2021-05-31 9:37 ` Joerg Roedel
2021-05-31 14:56 ` Pu Wen [this message]
2021-06-01 14:39 ` Borislav Petkov
2021-06-01 16:14 ` Sean Christopherson
2021-06-01 16:36 ` Tom Lendacky
2021-06-01 16:59 ` Borislav Petkov
2021-06-01 17:16 ` Sean Christopherson
2021-06-01 17:48 ` Borislav Petkov
2021-06-01 18:08 ` Sean Christopherson
2021-06-01 18:24 ` Borislav Petkov
2021-06-01 17:09 ` Sean Christopherson
2021-06-01 18:30 ` Tom Lendacky
2021-06-02 6:55 ` Wen Pu
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