From: Paolo Bonzini <pbonzini@redhat.com>
To: kvm@vger.kernel.org, rkrcmar@redhat.com,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H . Peter Anvin" <hpa@zytor.com>,
x86@kernel.org, linux-kernel@vger.kernel.org,
Gleb Natapov <gleb@kernel.org>, Boris Petkov <bp@suse.de>,
Tony Luck <tony.luck@intel.com>,
Andi Kleen <andi.kleen@intel.com>,
Ashok Raj <ashok.raj@intel.com>
Subject: Re: [PATCH v2 2/3] KVM: VMX: validate individual bits of guest MSR_IA32_FEATURE_CONTROL
Date: Thu, 16 Jun 2016 13:19:16 +0200 [thread overview]
Message-ID: <e220ab28-7e47-8f0e-9d24-666b9a04582d@redhat.com> (raw)
In-Reply-To: <20160616111655.ltcgle2cju2fksrx@hz-desktop>
On 16/06/2016 13:16, Haozhong Zhang wrote:
>> However, I think FEATURE_CONTROL_LOCKED should always be writable. If
>> you change that, it's simpler to just do |= and &= in the caller.
>
> These two functions (add/del) are to prevent callers from forgetting
> setting/clearing FEATURE_CONTROL_LOCKED in
> msr_ia32_feature_control_valid_bits: it should be set if any feature
> bit is set, and be cleared if all feature bits are cleared. The second
> rule could relaxed as we can always present MSR_IA32_FEATURE_CONTROL
> to guest.
Yes, this means that FEATURE_CONTROL_LOCKED effectively is always valid.
So you end up with just &= to clear and |= to set.
> I'm okey to let callers take care for the locked bit.
>
>>> + to_vmx(vcpu)->msr_ia32_feature_control_valid_bits |=
>>> + bits | FEATURE_CONTROL_LOCKED;
>>> +}
>>> +
>>> +static void feature_control_valid_bits_del(struct kvm_vcpu *vcpu, uint64_t bits)
>>> +{
>>> + uint64_t *valid_bits =
>>> + &to_vmx(vcpu)->msr_ia32_feature_control_valid_bits;
>>> + ASSERT(!(bits & ~FEATURE_CONTROL_MAX_VALID_BITS));
>>> + *valid_bits &= ~bits;
>>> + if (!(*valid_bits & ~FEATURE_CONTROL_LOCKED))
>>> + *valid_bits = 0;
>>> +}
>>> +
>>> #define VMCS12_OFFSET(x) offsetof(struct vmcs12, x)
>>> #define FIELD(number, name) [number] = VMCS12_OFFSET(name)
>>> #define FIELD64(number, name) [number] = VMCS12_OFFSET(name), \
>>> @@ -2864,6 +2897,14 @@ static int vmx_get_vmx_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
>>> return 0;
>>> }
>>>
>>> +static inline bool vmx_feature_control_msr_valid(struct kvm_vcpu *vcpu,
>>> + uint64_t val)
>>> +{
>>> + uint64_t valid_bits = to_vmx(vcpu)->msr_ia32_feature_control_valid_bits;
>>> +
>>> + return valid_bits && !(val & ~valid_bits);
>>> +}
>>> /*
>>> * Reads an msr value (of 'msr_index') into 'pdata'.
>>> * Returns 0 on success, non-0 otherwise.
>>> @@ -2906,7 +2947,7 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>>> msr_info->data = vmcs_read64(GUEST_BNDCFGS);
>>> break;
>>> case MSR_IA32_FEATURE_CONTROL:
>>> - if (!nested_vmx_allowed(vcpu))
>>> + if (!vmx_feature_control_msr_valid(vcpu, 0))
>>
>> You can remove this if completely in patch 1. It's okay to make the MSR
>> always available.
>>
>
> But then it also allows all bits to be set by guests, even though some
> features are not available.
Note that this is "get". Of course the "if" must stay in vmx_set_msr.
Paolo
next prev parent reply other threads:[~2016-06-16 11:19 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-16 6:05 [PATCH v2 0/3] Add KVM support for Intel local MCE Haozhong Zhang
2016-06-16 6:05 ` [PATCH v2 1/3] KVM: VMX: move msr_ia32_feature_control to vcpu_vmx Haozhong Zhang
2016-06-16 11:49 ` Borislav Petkov
2016-06-16 11:57 ` Paolo Bonzini
2016-06-16 11:57 ` Haozhong Zhang
2016-06-16 6:05 ` [PATCH v2 2/3] KVM: VMX: validate individual bits of guest MSR_IA32_FEATURE_CONTROL Haozhong Zhang
2016-06-16 9:55 ` Paolo Bonzini
2016-06-16 11:21 ` Haozhong Zhang
2016-06-16 10:01 ` Paolo Bonzini
2016-06-16 11:16 ` Haozhong Zhang
2016-06-16 11:19 ` Paolo Bonzini [this message]
2016-06-16 11:29 ` Haozhong Zhang
2016-06-16 6:05 ` [PATCH v2 3/3] KVM: VMX: enable guest access to LMCE related MSRs Haozhong Zhang
2016-06-16 10:04 ` Paolo Bonzini
2016-06-16 10:49 ` Haozhong Zhang
2016-06-16 14:55 ` Eduardo Habkost
2016-06-17 1:11 ` Haozhong Zhang
2016-06-17 17:15 ` Eduardo Habkost
2016-06-20 1:49 ` Haozhong Zhang
2016-06-20 6:55 ` Paolo Bonzini
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=e220ab28-7e47-8f0e-9d24-666b9a04582d@redhat.com \
--to=pbonzini@redhat.com \
--cc=andi.kleen@intel.com \
--cc=ashok.raj@intel.com \
--cc=bp@suse.de \
--cc=gleb@kernel.org \
--cc=hpa@zytor.com \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=rkrcmar@redhat.com \
--cc=tglx@linutronix.de \
--cc=tony.luck@intel.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).