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Subject: Re: [PATCH 04/23] x86, tlb: make CR4-based TLB flushes more robust
To: Andy Lutomirski <luto@kernel.org>,
        "Kirill A. Shutemov" <kirill@shutemov.name>
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        X86 ML <x86@kernel.org>
From: Dave Hansen <dave.hansen@linux.intel.com>
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Date: Wed, 1 Nov 2017 15:21:21 -0700
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On 11/01/2017 04:18 AM, Andy Lutomirski wrote:
>>> How about just adding a VM_WARN_ON_ONCE, then?
>> What's wrong with xor? The function will continue to work this way even if
>> CR4.PGE is disabled.
> That's true.  OTOH, since no one is actually proposing doing that,
> there's an argument that people should get warned and therefore be
> forced to think about it.

What this patch does in the end is make sure that
__native_flush_tlb_global_irq_disabled() works, no matter the intiial
state of CR4.PGE, *and* it makes it WARN if it gets called in an
unexpected initial state (CR4.PGE).

That's the best of both worlds IMNHO.  Makes people think, and does the
right thing no matter what.