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From: Jon Masters <jcm@redhat.com>
To: Gabriele Paoloni <gabriele.paoloni@huawei.com>,
	"liudongdong (C)" <liudongdong3@huawei.com>,
	"helgaas@kernel.org" <helgaas@kernel.org>,
	"arnd@arndb.de" <arnd@arndb.de>,
	"will.deacon@arm.com" <will.deacon@arm.com>,
	"catalin.marinas@arm.com" <catalin.marinas@arm.com>,
	"rafael@kernel.org" <rafael@kernel.org>,
	"hanjun.guo@linaro.org" <hanjun.guo@linaro.org>,
	"Lorenzo.Pieralisi@arm.com" <Lorenzo.Pieralisi@arm.com>,
	"okaya@codeaurora.org" <okaya@codeaurora.org>,
	"jchandra@broadcom.com" <jchandra@broadcom.com>,
	"tn@semihalf.com" <tn@semihalf.com>
Cc: "jcm@redhat.com" <jcm@redhat.com>,
	"linaro-acpi@lists.linaro.org" <linaro-acpi@lists.linaro.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"dhdang@apm.com" <dhdang@apm.com>,
	"Liviu.Dudau@arm.com" <Liviu.Dudau@arm.com>,
	"ddaney@caviumnetworks.com" <ddaney@caviumnetworks.com>,
	"jeremy.linton@arm.com" <jeremy.linton@arm.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-acpi@vger.kernel.org" <linux-acpi@vger.kernel.org>,
	"robert.richter@caviumnetworks.com" 
	<robert.richter@caviumnetworks.com>,
	"Chenxin (Charles)" <charles.chenxin@huawei.com>,
	"cov@codeaurora.org" <cov@codeaurora.org>,
	Wangyijing <wangyijing@huawei.com>,
	"mw@semihalf.com" <mw@semihalf.com>,
	"andrea.gallo@linaro.org" <andrea.gallo@linaro.org>,
	Linuxarm <linuxarm@huawei.com>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [Linaro-acpi] [RFC PATCH V2 1/2] ACPI/PCI: Match PCI config space accessors against platfrom specific ECAM quirks
Date: Thu, 16 Jun 2016 02:31:55 -0400	[thread overview]
Message-ID: <e3174a09-e6f8-126d-d3c5-648d1cfd2b74@redhat.com> (raw)
In-Reply-To: <EE11001F9E5DDD47B7634E2F8A612F2E1F782C86@lhreml507-mbx>

On 06/13/2016 09:54 AM, Gabriele Paoloni wrote:
> Hi Tomasz, Jon

Hi Gab,

Sorry for the lag in following up.

<snip>

> As you can see here Liudongdong has replaced oem_revision with
> oem_table_id.
> 
> Now it seems that there are some platforms that have already shipped
> using a matching based on the oem_revision (right Jon?)

Actually, it turns out (Cov is correct) that we can just match on OEM
Table ID. The revision should not generally be needed and the vendors
will just need to make sure that they change OEM Table ID in future
silicon. An example from two shipping platforms:

1). AppliedMicro Mustang:

[000h 0000   4]                    Signature : "MCFG"    [Memory Mapped
Configuration table]
[004h 0004   4]                 Table Length : 0000003C
[008h 0008   1]                     Revision : 01
[009h 0009   1]                     Checksum : 4A
[00Ah 0010   6]                       Oem ID : "APM   "
[010h 0016   8]                 Oem Table ID : "XGENE   "
[018h 0024   4]                 Oem Revision : 00000002
[01Ch 0028   4]              Asl Compiler ID : "INTL"
[020h 0032   4]        Asl Compiler Revision : 20140724

2). HP(E[0]) Moonshot:

[000h 0000   4]                    Signature : "MCFG"    [Memory Mapped
Configuration table]
[004h 0004   4]                 Table Length : 0000003C
[008h 0008   1]                     Revision : 01
[009h 0009   1]                     Checksum : 48
[00Ah 0010   6]                       Oem ID : "APM   "
[010h 0016   8]                 Oem Table ID : "XGENE   "
[018h 0024   4]                 Oem Revision : 00000001
[01Ch 0028   4]              Asl Compiler ID : "HP  "
[020h 0032   4]        Asl Compiler Revision : 00000001

I have pinged the semiconductor (Applied) and insisted upon a written
plan (which I have now) for handling the first affect generation(s) and
future chip roadmap stuff, along with how they plan to upstream this
immediately as part of this thread. I have also done similar with each
of the other vendors (this is something ARM or Linaro should be doing).
But I particularly care about X-Gene because I want it to be loved as
shipping silicon in production systems (Moonshot) that are sitting and
waiting in the Fedora Phoenix datacenter in large quantity to come
online if only an upstream kernel would actually boot on them :)

> However I guess that if in FW they have defined oem_table_id properly
> they should be able to use this mechanism without needing to a FW update.

Correct.

> Can these vendors confirm this?

I've checked all current shipping silicon and prototypes.

> Tomasz do you think this can work for Cavium Thunder?

Will let the vendors followup directly as well.

Jon.

[0] Fortunately that name change doesn't factor when using semiconductor
matching...hopefully none of the non-complaint IP companies in gen1
stuff get bought and change their table names. In the unlikely event
that that does happen, I will preemptively beat them up and ensure that
something crazy doesn't happen with table contents.

-- 
Computer Architect | Sent from my Fedora powered laptop

  parent reply	other threads:[~2016-06-16  6:32 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-13 13:02 [RFC PATCH V2 0/2] ECAM quirks handling for ARM64 platforms Dongdong Liu
2016-06-13 13:02 ` [RFC PATCH V2 1/2] ACPI/PCI: Match PCI config space accessors against platfrom specific ECAM quirks Dongdong Liu
2016-06-13 13:54   ` Gabriele Paoloni
2016-06-13 14:02     ` Sinan Kaya
2016-06-13 14:29       ` Gabriele Paoloni
2016-06-13 15:12         ` okaya
2016-06-13 15:59           ` Jeffrey Hugo
2016-06-13 21:07             ` Duc Dang
2016-06-16  6:31     ` Jon Masters [this message]
2016-06-16  7:45       ` [Linaro-acpi] " Duc Dang
2016-06-16  7:54         ` Jon Masters
2016-06-13 15:47   ` Christopher Covington
2016-06-13 20:57     ` Duc Dang
2016-06-14  5:51       ` Dongdong Liu
2016-06-14  9:00         ` Duc Dang
2016-06-14  9:45           ` Dongdong Liu
2016-06-14 11:52             ` Tomasz Nowicki
2016-06-14 17:43               ` Duc Dang
2016-06-13 13:02 ` [RFC PATCH V2 2/2] ARM64/PCI: Start using quirks handling for ACPI based PCI host controller Dongdong Liu

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