From: David Laight <David.Laight@ACULAB.COM>
To: 'Maximilian Luz' <email@example.com>,
Thomas Gleixner <firstname.lastname@example.org>,
Ingo Molnar <email@example.com>, Borislav Petkov <firstname.lastname@example.org>
Cc: "H. Peter Anvin" <email@example.com>, Sachi King <firstname.lastname@example.org>,
Subject: RE: [PATCH] x86/i8259: Work around buggy legacy PIC
Date: Thu, 13 May 2021 10:36:27 +0000 [thread overview]
Message-ID: <e43d9a823c9e44bab0cdbf32a000c373@AcuMS.aculab.com> (raw)
> -----Original Message-----
> From: Maximilian Luz <email@example.com>
> Sent: 13 May 2021 11:12
> To: David Laight <David.Laight@ACULAB.COM>; Thomas Gleixner <firstname.lastname@example.org>; Ingo Molnar
> <email@example.com>; Borislav Petkov <firstname.lastname@example.org>
> Cc: H. Peter Anvin <email@example.com>; Sachi King <firstname.lastname@example.org>; email@example.com; linux-
> firstname.lastname@example.org; email@example.com
> Subject: Re: [PATCH] x86/i8259: Work around buggy legacy PIC
> On 5/13/21 10:10 AM, David Laight wrote:
> > From: Maximilian Luz
> >> Sent: 12 May 2021 22:05
> >> The legacy PIC on the AMD variant of the Microsoft Surface Laptop 4 has
> >> some problems on boot. For some reason it consistently does not respond
> >> on the first try, requiring a couple more tries before it finally
> >> responds.
> > That seems very strange, something else must be going on that causes the grief.
> > The 8259 will be built into to the one of the cpu support chips.
> > I can't imagine that requires anything special.
> Right, it's definitely strange. Both Sachi (I imagine) and I don't know
> much about these devices, so we're open for suggestions.
I found a copy of the datasheet (I don't seem to have the black book):
The PC hardware has two 8259 in cascade mode.
(Cascaded using an interrupt that wasn't really using in the original
8088 PC which only had one 8259.)
I wonder if the bios has actually initialised is properly.
Some initialisation writes have to be done to set everything up.
It is also worth noting that the probe code is spectacularly crap.
It writes 0xff and then checks that 0xff is read back.
Almost anything (including a failed PCIe read to the ISA bridge)
will return 0xff and make the test pass.
It's about 35 years since I last wrote the code to initialise an 8259.
The memory cells are foggy.
Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
Registration No: 1397386 (Wales)
next prev parent reply other threads:[~2021-05-13 10:36 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-12 21:04 [PATCH] x86/i8259: Work around buggy legacy PIC Maximilian Luz
2021-05-13 8:10 ` David Laight
2021-05-13 10:11 ` Maximilian Luz
2021-05-13 10:36 ` David Laight [this message]
2021-05-14 13:01 ` Thomas Gleixner
2021-05-14 13:13 ` David Laight
2021-05-14 16:19 ` Ingo Molnar
2021-05-14 19:41 ` Sachi King
2021-05-14 10:51 ` David Laight
2021-05-14 11:58 ` Maximilian Luz
2021-05-14 17:32 ` Thomas Gleixner
2021-05-14 17:35 ` H. Peter Anvin
2021-05-14 22:47 ` Maximilian Luz
2021-05-17 18:40 ` Thomas Gleixner
2021-05-17 19:25 ` Maximilian Luz
2021-05-17 23:27 ` Thomas Gleixner
2021-05-18 8:28 ` Andy Shevchenko
2021-05-18 19:58 ` Sachi King
2021-05-18 15:45 ` Thomas Gleixner
2021-05-14 13:44 ` Thomas Gleixner
2021-05-14 16:12 ` David Laight
2021-05-14 17:28 ` H. Peter Anvin
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).