From: Matthias Brugger <matthias.bgg@gmail.com>
To: Seiya Wang <seiya.wang@mediatek.com>,
"Rafael J . Wysocki" <rjw@rjwysocki.net>,
Viresh Kumar <viresh.kumar@linaro.org>,
Rob Herring <robh+dt@kernel.org>
Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, srv_heupstream@mediatek.com
Subject: Re: [PATCH 2/2] dt-bindings: cpufreq: update cpu type and clock name for MT8173 SoC
Date: Mon, 29 Mar 2021 13:29:29 +0200 [thread overview]
Message-ID: <e460b0b8-9e99-974d-e6bc-e6fc89177ecb@gmail.com> (raw)
In-Reply-To: <20210326031227.2357-2-seiya.wang@mediatek.com>
On 26/03/2021 04:12, Seiya Wang wrote:
> Update the cpu type of cpu2 and cpu3 since MT8173 used Cortex-a72.
>
> Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
> ---
> Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt
> index ea4994b35207..ef68711716fb 100644
> --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt
> +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt
> @@ -202,11 +202,11 @@ Example 2 (MT8173 SoC):
>
> cpu2: cpu@100 {
> device_type = "cpu";
> - compatible = "arm,cortex-a57";
> + compatible = "arm,cortex-a72";
> reg = <0x100>;
> enable-method = "psci";
> cpu-idle-states = <&CPU_SLEEP_0>;
> - clocks = <&infracfg CLK_INFRA_CA57SEL>,
> + clocks = <&infracfg CLK_INFRA_CA72SEL>,
> <&apmixedsys CLK_APMIXED_MAINPLL>;
> clock-names = "cpu", "intermediate";
> operating-points-v2 = <&cpu_opp_table_b>;
> @@ -214,11 +214,11 @@ Example 2 (MT8173 SoC):
>
> cpu3: cpu@101 {
> device_type = "cpu";
> - compatible = "arm,cortex-a57";
> + compatible = "arm,cortex-a72";
> reg = <0x101>;
> enable-method = "psci";
> cpu-idle-states = <&CPU_SLEEP_0>;
> - clocks = <&infracfg CLK_INFRA_CA57SEL>,
> + clocks = <&infracfg CLK_INFRA_CA72SEL>,
> <&apmixedsys CLK_APMIXED_MAINPLL>;
> clock-names = "cpu", "intermediate";
> operating-points-v2 = <&cpu_opp_table_b>;
>
next prev parent reply other threads:[~2021-03-29 11:30 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-26 3:12 [PATCH 1/2] clk: mediatek: remove deprecated CLK_INFRA_CA57SEL for MT8173 SoC Seiya Wang
2021-03-26 3:12 ` [PATCH 2/2] dt-bindings: cpufreq: update cpu type and clock name " Seiya Wang
2021-03-26 5:27 ` Viresh Kumar
2021-03-27 17:58 ` Rob Herring
2021-03-29 11:29 ` Matthias Brugger [this message]
2021-03-27 17:57 ` [PATCH 1/2] clk: mediatek: remove deprecated CLK_INFRA_CA57SEL " Rob Herring
2021-03-29 11:29 ` Matthias Brugger
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