Re: [PATCH v7 4/5] perf arm-spe: Don't set data source if it's not a memory operation

[German Gomez <german.gomez@arm.com>]

On 26/04/2022 14:59, Ali Saidi wrote:
> From: Leo Yan <leo.yan@linaro.org>
>
> Except memory load and store operations, Arm SPE records also can
> support other operation types, bug when set the data source field the
> current code assumes a record is a either load operation or store
> operation, this leads to wrongly synthesize memory samples.
>
> This patch strictly checks the record operation type, it only sets data
> source only for the operation types ARM_SPE_LD and ARM_SPE_ST,
> otherwise, returns zero for data source.  Therefore, we can synthesize
> memory samples only when data source is a non-zero value, the function
> arm_spe__is_memory_event() is useless and removed.
>
> Signed-off-by: Leo Yan <leo.yan@linaro.org>
> Reviewed-by: Ali Saidi <alisaidi@amazon.com>
> Tested-by: Ali Saidi <alisaidi@amazon.com>

I think the Fixes tag is missing, right?

Fixes: e55ed3423c1b ("perf arm-spe: Synthesize memory event")
Reviewed-by: German Gomez <german.gomez@arm.com>

Thanks,
German

> ---
>  tools/perf/util/arm-spe.c | 22 ++++++++--------------
>  1 file changed, 8 insertions(+), 14 deletions(-)
>
> diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c
> index d2b64e3f588b..e032efc03274 100644
> --- a/tools/perf/util/arm-spe.c
> +++ b/tools/perf/util/arm-spe.c
> @@ -387,26 +387,16 @@ static int arm_spe__synth_instruction_sample(struct arm_spe_queue *speq,
>  	return arm_spe_deliver_synth_event(spe, speq, event, &sample);
>  }
>  
> -#define SPE_MEM_TYPE	(ARM_SPE_L1D_ACCESS | ARM_SPE_L1D_MISS | \
> -			 ARM_SPE_LLC_ACCESS | ARM_SPE_LLC_MISS | \
> -			 ARM_SPE_REMOTE_ACCESS)
> -
> -static bool arm_spe__is_memory_event(enum arm_spe_sample_type type)
> -{
> -	if (type & SPE_MEM_TYPE)
> -		return true;
> -
> -	return false;
> -}
> -
>  static u64 arm_spe__synth_data_source(const struct arm_spe_record *record)
>  {
>  	union perf_mem_data_src	data_src = { 0 };
>  
>  	if (record->op == ARM_SPE_LD)
>  		data_src.mem_op = PERF_MEM_OP_LOAD;
> -	else
> +	else if (record->op == ARM_SPE_ST)
>  		data_src.mem_op = PERF_MEM_OP_STORE;
> +	else
> +		return 0;
>  
>  	if (record->type & (ARM_SPE_LLC_ACCESS | ARM_SPE_LLC_MISS)) {
>  		data_src.mem_lvl = PERF_MEM_LVL_L3;
> @@ -510,7 +500,11 @@ static int arm_spe_sample(struct arm_spe_queue *speq)
>  			return err;
>  	}
>  
> -	if (spe->sample_memory && arm_spe__is_memory_event(record->type)) {
> +	/*
> +	 * When data_src is zero it means the record is not a memory operation,
> +	 * skip to synthesize memory sample for this case.
> +	 */
> +	if (spe->sample_memory && data_src) {
>  		err = arm_spe__synth_mem_sample(speq, spe->memory_id, data_src);
>  		if (err)
>  			return err;