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From: Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
To: Mark Brown <broonie@kernel.org>
Cc: Will Deacon <will@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Jonathan Corbet <corbet@lwn.net>, Marc Zyngier <maz@kernel.org>,
	Joey Gouly <joey.gouly@arm.com>,
	Vincenzo Frascino <Vincenzo.Frascino@arm.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Anshuman Khandual <anshuman.khandual@arm.com>,
	Fuad Tabba <tabba@google.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Vladimir Murzin <vladimir.murzin@arm.com>,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Mathieu Poirier <mathieu.poirier@linaro.org>,
	linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64/sme: Add hwcap for Scalable Matrix Extension
Date: Fri, 15 Apr 2022 10:25:33 +0800	[thread overview]
Message-ID: <e7a0d0d4-b6ca-6fec-df33-929961f0d43e@linux.alibaba.com> (raw)
In-Reply-To: <YlgNW0/ji6KlkyZo@sirena.org.uk>

Hi Mark,

On 4/14/22 8:02 PM, Mark Brown wrote:
> On Thu, Apr 14, 2022 at 07:55:44PM +0800, Tianjia Zhang wrote:
> 
>> Allow userspace to detect support for SME (Scalable Matrix Extension)
>> by providing a hwcap for it, using the official feature name FEAT_SME,
>> declared in ARM DDI 0487H.a specification.
> 
> There's already a hwcap for the core feature and all the subfeatures
> added as part of the series I've been posting for SME:
> 
>     https://lore.kernel.org/linux-arm-kernel/20220408114328.1401034-1-broonie@kernel.org/
> 
> Why add something independently, especially given that there is no way
> for userspace to do anything constructive with the feature without the
> rest of the kernel support?  Any attempt to use SME instructions without
> kernel support will trap and generate a SIGILL even if the feature is
> present in hardware.

Great job, I encountered the issue of invalid REVD (requires FEAT_SME)
instruction when developing SVE2 programs, so I plan to gradually
support SME in the kernel, thanks for your contribution, you can ignore
my patch.

In addition, I would like to ask a question, whether there is an
alternative SVE2 instruction for the REVD instruction that can complete
this operation, if the machine does not support SME.

> 
> Do you have a system with SME that you're trying to use?  Review/testing
> on the current series would be appreciated.

Unfortunately, the value currently read by my machine ID_AA64PFR1_EL1
register is 0x121. It seems that the hardware does not support SME. Is
there any other help I can provide?

Kind regards,
Tianjia

  reply	other threads:[~2022-04-15  2:25 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-14 11:55 [PATCH] arm64/sme: Add hwcap for Scalable Matrix Extension Tianjia Zhang
2022-04-14 12:02 ` Mark Brown
2022-04-15  2:25   ` Tianjia Zhang [this message]
2022-04-19 13:58     ` Mark Brown
2022-04-24  9:27       ` Tianjia Zhang
2022-04-14 12:06 ` Marc Zyngier
2022-04-15  2:30   ` Tianjia Zhang

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