linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Lv Zheng <lv.zheng@intel.com>
To: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Len Brown <len.brown@intel.com>
Cc: Lv Zheng <lv.zheng@intel.com>, Lv Zheng <zetalog@gmail.com>,
	<linux-kernel@vger.kernel.org>,
	linux-acpi@vger.kernel.org, Bob Moore <robert.moore@intel.com>
Subject: [PATCH v2 11/13] ACPICA: ACPI 2.0, Hardware: Add access_width/bit_offset support for acpi_hw_write()
Date: Thu,  5 May 2016 13:00:29 +0800	[thread overview]
Message-ID: <e82bb77dbbfa4ce33293ca6101db69d1d8564f28.1462418912.git.lv.zheng@intel.com> (raw)
In-Reply-To: <cover.1462418912.git.lv.zheng@intel.com>

ACPICA commit 48eea5e7993ccb7189bd63cd726e02adafee6057

This patch adds access_width/bit_offset support in acpi_hw_write().
Lv Zheng.

Link: https://github.com/acpica/acpica/commit/48eea5e7
Link: https://bugs.acpica.org/show_bug.cgi?id=1240
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
---
 drivers/acpi/acpica/hwregs.c |  146 +++++++++++++++++++++++++++++++++++++++---
 1 file changed, 137 insertions(+), 9 deletions(-)

diff --git a/drivers/acpi/acpica/hwregs.c b/drivers/acpi/acpica/hwregs.c
index 6eee012..0f18dbc 100644
--- a/drivers/acpi/acpica/hwregs.c
+++ b/drivers/acpi/acpica/hwregs.c
@@ -311,6 +311,12 @@ acpi_status acpi_hw_read(u32 *value, struct acpi_generic_address *reg)
 acpi_status acpi_hw_write(u32 value, struct acpi_generic_address *reg)
 {
 	u64 address;
+	u8 access_width;
+	u32 bit_width;
+	u8 bit_offset;
+	u64 value64;
+	u32 new_value32, old_value32;
+	u8 index;
 	acpi_status status;
 
 	ACPI_FUNCTION_NAME(hw_write);
@@ -322,23 +328,145 @@ acpi_status acpi_hw_write(u32 value, struct acpi_generic_address *reg)
 		return (status);
 	}
 
+	/* Convert access_width into number of bits based */
+
+	access_width = acpi_hw_get_access_bit_width(reg, 32);
+	bit_width = reg->bit_offset + reg->bit_width;
+	bit_offset = reg->bit_offset;
+
 	/*
 	 * Two address spaces supported: Memory or IO. PCI_Config is
 	 * not supported here because the GAS structure is insufficient
 	 */
-	if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
-		status = acpi_os_write_memory((acpi_physical_address)
-					      address, (u64)value,
-					      reg->bit_width);
-	} else {		/* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
-
-		status = acpi_hw_write_port((acpi_io_address)
-					    address, value, reg->bit_width);
+	index = 0;
+	while (bit_width) {
+		/*
+		 * Use offset style bit reads because "Index * AccessWidth" is
+		 * ensured to be less than 32-bits by acpi_hw_validate_register().
+		 */
+		new_value32 = ACPI_GET_BITS(&value, index * access_width,
+					    ACPI_MASK_BITS_ABOVE_32
+					    (access_width));
+
+		if (bit_offset >= access_width) {
+			bit_offset -= access_width;
+		} else {
+			/*
+			 * Use offset style bit masks because access_width is ensured
+			 * to be less than 32-bits by acpi_hw_validate_register() and
+			 * bit_offset/bit_width is less than access_width here.
+			 */
+			if (bit_offset) {
+				new_value32 &= ACPI_MASK_BITS_BELOW(bit_offset);
+			}
+			if (bit_width < access_width) {
+				new_value32 &= ACPI_MASK_BITS_ABOVE(bit_width);
+			}
+
+			if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
+				if (bit_offset || bit_width < access_width) {
+					/*
+					 * Read old values in order not to modify the bits that
+					 * are beyond the register bit_width/bit_offset setting.
+					 */
+					status =
+					    acpi_os_read_memory((acpi_physical_address)
+								address +
+								index *
+								ACPI_DIV_8
+								(access_width),
+								&value64,
+								access_width);
+					old_value32 = (u32)value64;
+
+					/*
+					 * Use offset style bit masks because access_width is
+					 * ensured to be less than 32-bits by
+					 * acpi_hw_validate_register() and bit_offset/bit_width is
+					 * less than access_width here.
+					 */
+					if (bit_offset) {
+						old_value32 &=
+						    ACPI_MASK_BITS_ABOVE
+						    (bit_offset);
+						bit_offset = 0;
+					}
+					if (bit_width < access_width) {
+						old_value32 &=
+						    ACPI_MASK_BITS_BELOW
+						    (bit_width);
+					}
+
+					new_value32 |= old_value32;
+				}
+
+				value64 = (u64)new_value32;
+				status =
+				    acpi_os_write_memory((acpi_physical_address)
+							 address +
+							 index *
+							 ACPI_DIV_8
+							 (access_width),
+							 value64, access_width);
+			} else {	/* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
+
+				if (bit_offset || bit_width < access_width) {
+					/*
+					 * Read old values in order not to modify the bits that
+					 * are beyond the register bit_width/bit_offset setting.
+					 */
+					status =
+					    acpi_hw_read_port((acpi_io_address)
+							      address +
+							      index *
+							      ACPI_DIV_8
+							      (access_width),
+							      &old_value32,
+							      access_width);
+
+					/*
+					 * Use offset style bit masks because access_width is
+					 * ensured to be less than 32-bits by
+					 * acpi_hw_validate_register() and bit_offset/bit_width is
+					 * less than access_width here.
+					 */
+					if (bit_offset) {
+						old_value32 &=
+						    ACPI_MASK_BITS_ABOVE
+						    (bit_offset);
+						bit_offset = 0;
+					}
+					if (bit_width < access_width) {
+						old_value32 &=
+						    ACPI_MASK_BITS_BELOW
+						    (bit_width);
+					}
+
+					new_value32 |= old_value32;
+				}
+
+				status = acpi_hw_write_port((acpi_io_address)
+							    address +
+							    index *
+							    ACPI_DIV_8
+							    (access_width),
+							    new_value32,
+							    access_width);
+			}
+		}
+
+		/*
+		 * Index * access_width is ensured to be less than 32-bits by
+		 * acpi_hw_validate_register().
+		 */
+		bit_width -=
+		    bit_width > access_width ? access_width : bit_width;
+		index++;
 	}
 
 	ACPI_DEBUG_PRINT((ACPI_DB_IO,
 			  "Wrote: %8.8X width %2d   to %8.8X%8.8X (%s)\n",
-			  value, reg->bit_width, ACPI_FORMAT_UINT64(address),
+			  value, access_width, ACPI_FORMAT_UINT64(address),
 			  acpi_ut_get_region_name(reg->space_id)));
 
 	return (status);
-- 
1.7.10

  parent reply	other threads:[~2016-05-05  5:00 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-04  5:47 [PATCH 00/15] ACPICA: 20160422 Release Lv Zheng
2016-05-04  5:48 ` [PATCH 01/15] ACPICA: Linuxize: reduce divergences for 20160422 release Lv Zheng
2016-05-04 21:37   ` Rafael J. Wysocki
2016-05-04 21:38     ` Rafael J. Wysocki
2016-05-05  2:16       ` Zheng, Lv
2016-05-05  2:15     ` Zheng, Lv
2016-05-04  5:48 ` [PATCH 02/15] ACPICA: Divergence: remove unwanted spaces for typedef Lv Zheng
2016-05-04  5:48 ` [PATCH 03/15] ACPICA: Refactor evaluate_object to reduce nesting Lv Zheng
2016-05-04  5:48 ` [PATCH 04/15] ACPICA: ACPI 6.1: Support for new PCCT subtable Lv Zheng
2016-05-04  5:48 ` [PATCH 05/15] ACPICA: ACPI 6.0: Update _BIX support for new package element Lv Zheng
2016-05-04  5:48 ` [PATCH 06/15] ACPICA: ACPI 6.0, tools/iasl: Add support for new resource descriptors Lv Zheng
2016-05-04  5:48 ` [PATCH 07/15] ACPICA: Renamed some #defined flag constants for clarity Lv Zheng
2016-05-04  5:48 ` [PATCH 08/15] ACPICA: Dispatcher: Update thread ID for recursive method calls Lv Zheng
2016-05-04 15:10   ` Prarit Bhargava
2016-05-04 19:22     ` Rafael J. Wysocki
2016-05-04 20:30       ` Mario_Limonciello
2016-05-04 20:45         ` Rafael J. Wysocki
2016-05-04  5:49 ` [PATCH 09/15] ACPICA: Utilities: Add ACPI_IS_ALIGNED() macro Lv Zheng
2016-05-04  5:49 ` [PATCH 10/15] ACPICA: Hardware: Add optimized access bit width support Lv Zheng
2016-05-04  5:49 ` [PATCH 11/15] ACPICA: Executer: Introduce a set of macros to handle bit width mask generation Lv Zheng
2016-05-04  5:49 ` [PATCH 12/15] ACPICA: Hardware: Add access_width/bit_offset support in acpi_hw_read() Lv Zheng
2016-05-04  5:49 ` [PATCH 13/15] ACPICA: Hardware: Add access_width/bit_offset support for acpi_hw_write() Lv Zheng
2016-05-04  5:49 ` [PATCH 14/15] ACPICA: Move all ASCII utilities to a common file Lv Zheng
2016-05-04  5:49 ` [PATCH 15/15] ACPICA: Update version to 20160422 Lv Zheng
2016-05-05  4:57 ` [PATCH v2 00/13] ACPICA: 20160422 Release Lv Zheng
2016-05-05  4:57   ` [PATCH v2 01/13] ACPICA: Divergence: remove unwanted spaces for typedef Lv Zheng
2016-05-05  4:58   ` [PATCH v2 02/13] ACPICA: Refactor evaluate_object to reduce nesting Lv Zheng
2016-05-05  4:58   ` [PATCH v2 03/13] ACPICA: ACPI 6.1: Support for new PCCT subtable Lv Zheng
2016-05-05  4:58   ` [PATCH v2 04/13] ACPICA: ACPI 6.0: Update _BIX support for new package element Lv Zheng
2016-05-05  4:58   ` [PATCH v2 05/13] ACPICA: ACPI 6.0, tools/iasl: Add support for new resource descriptors Lv Zheng
2016-05-05  4:58   ` [PATCH v2 06/13] ACPICA: Renamed some #defined flag constants for clarity Lv Zheng
2016-05-05  4:58   ` [PATCH v2 07/13] ACPICA: Utilities: Add ACPI_IS_ALIGNED() macro Lv Zheng
2016-05-05  4:58   ` [PATCH v2 08/13] ACPICA: Hardware: Add optimized access bit width support Lv Zheng
2016-05-25 19:17     ` Boris Ostrovsky
2016-05-26 16:26       ` Jan Beulich
2016-05-26 16:55         ` Boris Ostrovsky
2016-05-26 21:59           ` Boris Ostrovsky
2016-05-27  3:24           ` Zheng, Lv
2016-05-27  7:34           ` Zheng, Lv
2016-05-27 17:31             ` Boris Ostrovsky
2016-05-27  3:14       ` Zheng, Lv
2016-05-05  4:58   ` [PATCH v2 09/13] ACPICA: Executer: Introduce a set of macros to handle bit width mask generation Lv Zheng
2016-05-05  4:58   ` [PATCH v2 10/13] ACPICA: ACPI 2.0, Hardware: Add access_width/bit_offset support in acpi_hw_read() Lv Zheng
2016-05-05  5:00   ` Lv Zheng [this message]
2016-05-05  5:00   ` [PATCH v2 12/13] ACPICA: Move all ASCII utilities to a common file Lv Zheng
2016-05-05  5:00   ` [PATCH v2 13/13] ACPICA: Update version to 20160422 Lv Zheng
2016-05-05 23:49   ` [PATCH v2 00/13] ACPICA: 20160422 Release Rafael J. Wysocki

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=e82bb77dbbfa4ce33293ca6101db69d1d8564f28.1462418912.git.lv.zheng@intel.com \
    --to=lv.zheng@intel.com \
    --cc=len.brown@intel.com \
    --cc=linux-acpi@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=rafael.j.wysocki@intel.com \
    --cc=rjw@rjwysocki.net \
    --cc=robert.moore@intel.com \
    --cc=zetalog@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).