From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030445AbcHaQU4 (ORCPT ); Wed, 31 Aug 2016 12:20:56 -0400 Received: from foss.arm.com ([217.140.101.70]:36760 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935553AbcHaQUx (ORCPT ); Wed, 31 Aug 2016 12:20:53 -0400 Subject: Re: [PATCH v3] Added perf functionality to mmdc driver To: Zhengyu Shen , shawnguo@kernel.org References: <20160817194253.16300-1-zhengyu.shen@nxp.com> Cc: mark.rutland@arm.com, peterz@infradead.org, frank.li@nxp.com, linux-kernel@vger.kernel.org, acme@kernel.org, alexander.shishkin@linux.intel.com, mingo@redhat.com, lznuaa@gmail.com, linux-arm-kernel@lists.infradead.org From: Suzuki K Poulose Message-ID: Date: Wed, 31 Aug 2016 17:20:49 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.2.0 MIME-Version: 1.0 In-Reply-To: <20160817194253.16300-1-zhengyu.shen@nxp.com> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 17/08/16 20:42, Zhengyu Shen wrote: > MMDC is a multi-mode DDR controller that supports DDR3/DDR3L x16/x32/x64 > and LPDDR2 two channel x16/x32 memory types. MMDC is configurable, high > performance, and optimized. MMDC is present on i.MX6 Quad and i.MX6 > QuadPlus devices, but this driver only supports i.MX6 Quad at the moment. > MMDC provides registers for performance counters which read via this > driver to help debug memory throughput and similar issues. > > $ perf stat -a -e mmdc/busy-cycles/,mmdc/read-accesses/,mmdc/read-bytes/,mmdc/total-cycles/,mmdc/write-accesses/,mmdc/write-bytes/ dd if=/dev/zero of=/dev/null bs=1M count=5000 > Performance counter stats for 'dd if=/dev/zero of=/dev/null bs=1M count=5000': > > 898021787 mmdc/busy-cycles/ > 14819600 mmdc/read-accesses/ > 471.30 MB mmdc/read-bytes/ > 2815419216 mmdc/total-cycles/ > 13367354 mmdc/write-accesses/ > 427.76 MB mmdc/write-bytes/ > > 5.334757334 seconds time elapsed > > Signed-off-by: Zhengyu Shen > Signed-off-by: Frank Li > + > +static int mmdc_pmu_init(struct mmdc_pmu *pmu_mmdc, > + void __iomem *mmdc_base, struct device *dev) > +{ > + int mmdc_num; > + > + *pmu_mmdc = (struct mmdc_pmu) { > + .pmu = (struct pmu) { > + .task_ctx_nr = perf_invalid_context, > + .attr_groups = attr_groups, > + .event_init = mmdc_event_init, > + .add = mmdc_event_add, > + .del = mmdc_event_del, > + .start = mmdc_event_start, > + .stop = mmdc_event_stop, > + .read = mmdc_event_update, > + }, > + .mmdc_base = mmdc_base, > + }; > + > + mmdc_num = ida_simple_get(&mmdc_ida, 0, 0, GFP_KERNEL); > + > + cpumask_set_cpu(smp_processor_id(), &pmu_mmdc->cpu); > + > + pmu_mmdc->dev = dev; > + pmu_mmdc->active_events = 0; > + spin_lock_init(&pmu_mmdc->mmdc_active_events_lock); > + > + cpuhp_mmdc_pmu = pmu_mmdc; > + cpuhp_setup_state(CPUHP_ONLINE, > + "PERF_MMDC_ONLINE", NULL, > + mmdc_pmu_offline_cpu); You may want cpuhp_setup_state_nocalls instead here ? Cheers Suzuki