From: Cyrill Gorcunov <gorcunov@gmail.com>
To: mingo@elte.hu, macro@linux-mips.org
Cc: hpa@zytor.com, tglx@linutronix.de, linux-kernel@vger.kernel.org,
Cyrill Gorcunov <gorcunov@gmail.com>
Subject: [PATCH 06/15] x86: apic - unify lapic_setup_esr
Date: Mon, 18 Aug 2008 20:45:54 +0400 [thread overview]
Message-ID: <e97a40e970bc5cd8a873e52be6a90c0a459bc276.1219073223.git.gorcunov@gmail.com> (raw)
In-Reply-To: <1219077963-22883-1-git-send-email-gorcunov@gmail.com>
In-Reply-To: <8d555f8d496693d05b9e0836f18f62b1adb313c8.1219073223.git.gorcunov@gmail.com>
We use 32bit code former for 64bit
mode since it's much better implementation
and easier to merge.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
---
arch/x86/kernel/apic_32.c | 21 +++++++++--------
arch/x86/kernel/apic_64.c | 51 ++++++++++++++++++++++++++++++++++----------
2 files changed, 50 insertions(+), 22 deletions(-)
diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index 6d230e9..3c1562a 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -983,6 +983,16 @@ static void __cpuinit lapic_setup_esr(void)
{
unsigned long oldvalue, value, maxlvt;
if (lapic_is_integrated() && !esr_disable) {
+ if (esr_disable) {
+ /*
+ * Something untraceable is creating bad interrupts on
+ * secondary quads ... for the moment, just leave the
+ * ESR disabled - we can't do anything useful with the
+ * errors anyway - mbligh
+ */
+ printk(KERN_INFO "Leaving ESR disabled.\n");
+ return;
+ }
/* !82489DX */
maxlvt = lapic_get_maxlvt();
if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
@@ -1003,16 +1013,7 @@ static void __cpuinit lapic_setup_esr(void)
"vector: 0x%08lx after: 0x%08lx\n",
oldvalue, value);
} else {
- if (esr_disable)
- /*
- * Something untraceable is creating bad interrupts on
- * secondary quads ... for the moment, just leave the
- * ESR disabled - we can't do anything useful with the
- * errors anyway - mbligh
- */
- printk(KERN_INFO "Leaving ESR disabled.\n");
- else
- printk(KERN_INFO "No ESR for 82489DX.\n");
+ printk(KERN_INFO "No ESR for 82489DX.\n");
}
}
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index 5579e21..d74abf7 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -863,6 +863,45 @@ void __init init_bsp_APIC(void)
apic_write(APIC_LVT1, value);
}
+static void __cpuinit lapic_setup_esr(void)
+{
+ unsigned long oldvalue, value, maxlvt;
+ if (lapic_is_integrated() && !esr_disable) {
+ if (esr_disable) {
+ /*
+ * Something untraceable is creating bad interrupts on
+ * secondary quads ... for the moment, just leave the
+ * ESR disabled - we can't do anything useful with the
+ * errors anyway - mbligh
+ */
+ printk(KERN_INFO "Leaving ESR disabled.\n");
+ return;
+ }
+ /* !82489DX */
+ maxlvt = lapic_get_maxlvt();
+ if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
+ apic_write(APIC_ESR, 0);
+ oldvalue = apic_read(APIC_ESR);
+
+ /* enables sending errors */
+ value = ERROR_APIC_VECTOR;
+ apic_write(APIC_LVTERR, value);
+ /*
+ * spec says clear errors after enabling vector.
+ */
+ if (maxlvt > 3)
+ apic_write(APIC_ESR, 0);
+ value = apic_read(APIC_ESR);
+ if (value != oldvalue)
+ apic_printk(APIC_VERBOSE, "ESR value before enabling "
+ "vector: 0x%08lx after: 0x%08lx\n",
+ oldvalue, value);
+ } else {
+ printk(KERN_INFO "No ESR for 82489DX.\n");
+ }
+}
+
+
/**
* setup_local_APIC - setup the local APIC
*/
@@ -968,18 +1007,6 @@ void __cpuinit setup_local_APIC(void)
preempt_enable();
}
-static void __cpuinit lapic_setup_esr(void)
-{
- unsigned maxlvt = lapic_get_maxlvt();
-
- apic_write(APIC_LVTERR, ERROR_APIC_VECTOR);
- /*
- * spec says clear errors after enabling vector.
- */
- if (maxlvt > 3)
- apic_write(APIC_ESR, 0);
-}
-
void __cpuinit end_local_APIC_setup(void)
{
lapic_setup_esr();
--
1.6.0.rc1.34.g0fe8c
next prev parent reply other threads:[~2008-08-18 16:48 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-08-18 16:45 [PATCH 0/15] apic: unification series 5 Cyrill Gorcunov
2008-08-18 16:45 ` [PATCH 01/15] x86: apic - rearrange maxcpu definition Cyrill Gorcunov
2008-08-18 16:45 ` [PATCH 02/15] x86: apic - unify setup_boot_APIC_clock Cyrill Gorcunov
2008-08-18 16:45 ` [PATCH 03/15] x86: apic - unify disable_local_APIC Cyrill Gorcunov
2008-08-18 16:45 ` [PATCH 04/15] x86: apic - unify lapic_shutdown Cyrill Gorcunov
2008-08-18 16:45 ` [PATCH 05/15] x86: apic - unify connect_bsp_APIC Cyrill Gorcunov
2008-08-18 16:45 ` Cyrill Gorcunov [this message]
2008-08-18 16:45 ` [PATCH 07/15] x86: apic - unify __setup_APIC_LVTT Cyrill Gorcunov
2008-08-18 16:45 ` [PATCH 08/15] x86: apic - unify disconnect_bsp_APIC Cyrill Gorcunov
2008-08-18 16:45 ` [PATCH 09/15] x86: apic - generic_processor_info Cyrill Gorcunov
2008-08-18 16:45 ` [PATCH 10/15] x86: apic - unify end_local_APIC_setup Cyrill Gorcunov
2008-08-18 16:45 ` [PATCH 11/15] x86: apic - unify local_apic_timer_interrupt Cyrill Gorcunov
2008-08-18 16:46 ` [PATCH 12/15] x86: apic - unify apic_set_verbosity Cyrill Gorcunov
2008-08-18 16:46 ` [PATCH 13/15] x86: apic - unify disableapic and nolapic setup handlers Cyrill Gorcunov
2008-08-18 16:46 ` [PATCH 14/15] x86: apic - rearrange parse_lapic_timer_c2_ok Cyrill Gorcunov
2008-08-18 16:46 ` [PATCH 15/15] x86: apic - lapic_resume 32bit - unification fix Cyrill Gorcunov
2008-08-18 16:59 ` [PATCH 01/15] x86: apic - rearrange maxcpu definition Cyrill Gorcunov
2008-08-18 17:22 ` [PATCH 0/15] apic: unification series 5 H. Peter Anvin
2008-08-18 17:28 ` Cyrill Gorcunov
2008-08-18 19:12 ` Cyrill Gorcunov
2008-08-19 0:09 ` Ingo Molnar
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