From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 266CBC433E2 for ; Mon, 14 Sep 2020 16:17:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DCCEE217BA for ; Mon, 14 Sep 2020 16:17:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1600100260; bh=WZ3JO5Gd7EBYVjMMbhMOeo4vejDSPos4qMJKMNgdJhQ=; h=Date:From:To:Cc:Subject:In-Reply-To:References:List-ID:From; b=GlRopGlms8tAeJ0VGO1LJTYATO6ysYL27gzSv8UKR3Jap8WN6YilNpv2IjOc0hH7d t8gnInlIWufSGEgvEg1tLH4RntbkMFMqcHUUytldZQGlE9ct/HYxjQ15JUSvQSZnZj RGEsl19CtW1rMDZu9q4W6DSVlMz04Hpw+jeBjQJM= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726396AbgINQRi (ORCPT ); Mon, 14 Sep 2020 12:17:38 -0400 Received: from mail.kernel.org ([198.145.29.99]:35360 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726514AbgINQKj (ORCPT ); Mon, 14 Sep 2020 12:10:39 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 071E120759; Mon, 14 Sep 2020 16:10:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1600099839; bh=WZ3JO5Gd7EBYVjMMbhMOeo4vejDSPos4qMJKMNgdJhQ=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=L2cp9WOY8OMlxcWyMB6/2Xux4VfzP5E1xNev/ZN7trDJc3NSgtgugN4ERhnPz05Bq 7xo0thR5WiEtxEFW2LlpkSuEPJwkjKOesdACNGrP2lO71Rq2ZD4a2swKN2rK8Ctog5 7ykEHXgRIsc7jFSMyyJpnhLobJO4MHfex73CmSnU= Received: from disco-boy.misterjones.org ([51.254.78.96] helo=www.loen.fr) by disco-boy.misterjones.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1kHr3s-00Bjzy-Vu; Mon, 14 Sep 2020 17:10:37 +0100 MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Mon, 14 Sep 2020 17:10:36 +0100 From: Marc Zyngier To: Marek Szyprowski Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sumit Garg , kernel-team@android.com, Florian Fainelli , Russell King , Jason Cooper , Saravana Kannan , Andrew Lunn , Catalin Marinas , Gregory Clement , Thomas Gleixner , Will Deacon , Valentin Schneider , linux-rpi-kernel Subject: Re: [PATCH v3 10/16] irqchip/bcm2836: Configure mailbox interrupts as standard interrupts In-Reply-To: <3e52be78-1725-a3a2-c97c-625d46017a4b@samsung.com> References: <20200901144324.1071694-1-maz@kernel.org> <20200901144324.1071694-11-maz@kernel.org> <3e52be78-1725-a3a2-c97c-625d46017a4b@samsung.com> User-Agent: Roundcube Webmail/1.4.8 Message-ID: X-Sender: maz@kernel.org X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: m.szyprowski@samsung.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, sumit.garg@linaro.org, kernel-team@android.com, f.fainelli@gmail.com, linux@arm.linux.org.uk, jason@lakedaemon.net, saravanak@google.com, andrew@lunn.ch, catalin.marinas@arm.com, gregory.clement@bootlin.com, tglx@linutronix.de, will@kernel.org, Valentin.Schneider@arm.com, linux-rpi-kernel@lists.infradead.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Marek, On 2020-09-14 15:32, Marek Szyprowski wrote: > Hi Marc, > > On 01.09.2020 16:43, Marc Zyngier wrote: >> In order to switch the bcm2836 driver to privide standard interrupts >> for IPIs, it first needs to stop lying about the way things work. >> >> The mailbox interrupt is actually a multiplexer, with enough >> bits to store 32 pending interrupts per CPU. So let's turn it >> into a chained irqchip. >> >> Once this is done, we can instanciate the corresponding IPIs, >> and pass them to the architecture code. >> >> Signed-off-by: Marc Zyngier > > This one also fails. It breaks booting of Raspberry Pi 3b boards (both > in ARM and ARM64 mode): Damn. This used to work. Looks like I was eager to delete stuff at some point. Can you give this a go and let me know if that works for you (only tested in QEMU with the raspi2 model): diff --git a/drivers/irqchip/irq-bcm2836.c b/drivers/irqchip/irq-bcm2836.c index 85df6ddad9be..97838eb705f9 100644 --- a/drivers/irqchip/irq-bcm2836.c +++ b/drivers/irqchip/irq-bcm2836.c @@ -193,6 +193,8 @@ static void bcm2836_arm_irqchip_ipi_send_mask(struct irq_data *d, static struct irq_chip bcm2836_arm_irqchip_ipi = { .name = "IPI", + .irq_mask = bcm2836_arm_irqchip_dummy_op, + .irq_unmask = bcm2836_arm_irqchip_dummy_op, .irq_eoi = bcm2836_arm_irqchip_ipi_eoi, .ipi_send_mask = bcm2836_arm_irqchip_ipi_send_mask, }; Thanks again, M. -- Jazz is not dead. It just smells funny...