From: "Moger, Babu" <babu.moger@amd.com>
To: Borislav Petkov <bp@alien8.de>
Cc: tglx@linutronix.de, mingo@redhat.com,
dave.hansen@linux.intel.com, hpa@zytor.com, pbonzini@redhat.com,
seanjc@google.com, vkuznets@redhat.com, jmattson@google.com,
joro@8bytes.org, wanpengli@tencent.com,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
x86@kernel.org
Subject: Re: [PATCH 1/2] x86/cpufeatures: Add virtual TSC_AUX feature bit
Date: Fri, 8 Apr 2022 09:49:27 -0500 [thread overview]
Message-ID: <ea5dfc33-6bff-27c0-3f10-b31812f1cc52@amd.com> (raw)
In-Reply-To: <Yk/5kIlcAuW/RuDj@zn.tnic>
On 4/8/22 04:00, Borislav Petkov wrote:
> On Thu, Apr 07, 2022 at 07:57:50PM -0500, Babu Moger wrote:
>> The TSC_AUX Virtualization feature allows AMD SEV-ES guests to securely use
>> TSC_AUX (auxiliary time stamp counter data) MSR in RDTSCP and RDPID
>> instructions.
>>
>> The TSC_AUX MSR is typically initialized to APIC ID or another unique
>> identifier so that software can quickly associate returned TSC value
>> with the logical processor.
>>
>> Adds the feature bit and also include it in the kvm for detection.
> s/Adds/Add/
Thanks Boris. Will fix that.
>
>> Signed-off-by: Babu Moger <babu.moger@amd.com>
>> ---
>> arch/x86/include/asm/cpufeatures.h | 1 +
>> arch/x86/kvm/cpuid.c | 2 +-
>> 2 files changed, 2 insertions(+), 1 deletion(-)
> With that fixed:
>
> Acked-by: Borislav Petkov <bp@suse.de>
>
--
Thanks
Babu Moger
prev parent reply other threads:[~2022-04-08 14:49 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-08 0:57 [PATCH 1/2] x86/cpufeatures: Add virtual TSC_AUX feature bit Babu Moger
2022-04-08 0:57 ` [PATCH 2/2] KVM: SVM: Disable RDTSCP and TSC_AUX MSR intercepts when V_TSC_AUX is present Babu Moger
2022-04-08 9:00 ` [PATCH 1/2] x86/cpufeatures: Add virtual TSC_AUX feature bit Borislav Petkov
2022-04-08 14:49 ` Moger, Babu [this message]
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