From: Geert Uytterhoeven <geert+renesas@glider.be>
To: Andrzej Hajda <a.hajda@samsung.com>,
Neil Armstrong <narmstrong@baylibre.com>,
Robert Foss <robert.foss@linaro.org>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
Jonas Karlman <jonas@kwiboo.se>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
Geert Uytterhoeven <geert+renesas@glider.be>,
Fabio Estevam <festevam@gmail.com>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Subject: [PATCH v2] drm/bridge: nwl-dsi: Avoid potential multiplication overflow on 32-bit
Date: Wed, 14 Jul 2021 11:48:06 +0200 [thread overview]
Message-ID: <ebb82941a86b4e35c4fcfb1ef5a5cfad7c1fceab.1626255956.git.geert+renesas@glider.be> (raw)
As nwl_dsi.lanes is u32, and NSEC_PER_SEC is 1000000000L, the second
multiplication in
dsi->lanes * 8 * NSEC_PER_SEC
will overflow on a 32-bit platform. Fix this by making the constant
unsigned long long, forcing 64-bit arithmetic.
As iMX8 is arm64, this driver is currently used on 64-bit platforms
only, where long is 64-bit, so this cannot happen. But the issue will
start to happen when the driver is reused for a 32-bit SoC (e.g.
i.MX7ULP), or when code is copied for a new driver.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
Compile-tested only.
v2:
- Add Reviewed-by,
- Add reference to i.MX7ULP.
---
drivers/gpu/drm/bridge/nwl-dsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-dsi.c
index 873995f0a7416e58..6002404ffcb9df08 100644
--- a/drivers/gpu/drm/bridge/nwl-dsi.c
+++ b/drivers/gpu/drm/bridge/nwl-dsi.c
@@ -196,7 +196,7 @@ static u32 ps2bc(struct nwl_dsi *dsi, unsigned long long ps)
u32 bpp = mipi_dsi_pixel_format_to_bpp(dsi->format);
return DIV64_U64_ROUND_UP(ps * dsi->mode.clock * bpp,
- dsi->lanes * 8 * NSEC_PER_SEC);
+ dsi->lanes * 8ULL * NSEC_PER_SEC);
}
/*
--
2.25.1
reply other threads:[~2021-07-14 9:48 UTC|newest]
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