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[96.42.251.64]) by smtp.gmail.com with ESMTPSA id a202sm4221235ywe.8.2020.02.28.09.24.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 28 Feb 2020 09:24:02 -0800 (PST) Subject: Re: [PATCH v2] ARM: dts: rainier: Set PCA9552 pin types To: Matthew Barth , Joel Stanley , Andrew Jeffery , openbmc@lists.ozlabs.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, Eddie James References: <20200225201415.431668-1-msbarth@linux.ibm.com> From: Brandon Wyman Message-ID: Date: Fri, 28 Feb 2020 11:24:01 -0600 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0 MIME-Version: 1.0 In-Reply-To: <20200225201415.431668-1-msbarth@linux.ibm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2020-02-25 14:14, Matthew Barth wrote: > All 16 pins of the PCA9552 at 7-bit address 0x61 should be set as type > GPIO. > > Signed-off-by: Matthew Barth > --- > v2: Added leds-pca955x.h include > Added upstream to patch > --- Reviewed-by: Brandon Wyman > --- > arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > index c63cefce636d..d9fa9fd48058 100644 > --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > @@ -4,6 +4,7 @@ > > #include "aspeed-g6.dtsi" > #include > +#include > > / { > model = "Rainier"; > @@ -351,66 +352,82 @@ > > gpio@0 { > reg = <0>; > + type = ; > }; > > gpio@1 { > reg = <1>; > + type = ; > }; > > gpio@2 { > reg = <2>; > + type = ; > }; > > gpio@3 { > reg = <3>; > + type = ; > }; > > gpio@4 { > reg = <4>; > + type = ; > }; > > gpio@5 { > reg = <5>; > + type = ; > }; > > gpio@6 { > reg = <6>; > + type = ; > }; > > gpio@7 { > reg = <7>; > + type = ; > }; > > gpio@8 { > reg = <8>; > + type = ; > }; > > gpio@9 { > reg = <9>; > + type = ; > }; > > gpio@10 { > reg = <10>; > + type = ; > }; > > gpio@11 { > reg = <11>; > + type = ; > }; > > gpio@12 { > reg = <12>; > + type = ; > }; > > gpio@13 { > reg = <13>; > + type = ; > }; > > gpio@14 { > reg = <14>; > + type = ; > }; > > gpio@15 { > reg = <15>; > + type = ; > }; > }; >