From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C717C433B4 for ; Wed, 7 Apr 2021 15:29:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2FEF161262 for ; Wed, 7 Apr 2021 15:29:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353542AbhDGP3H (ORCPT ); Wed, 7 Apr 2021 11:29:07 -0400 Received: from so254-9.mailgun.net ([198.61.254.9]:63749 "EHLO so254-9.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243092AbhDGP3G (ORCPT ); Wed, 7 Apr 2021 11:29:06 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1617809336; h=Message-ID: References: In-Reply-To: Subject: Cc: To: From: Date: Content-Transfer-Encoding: Content-Type: MIME-Version: Sender; bh=F7RjGzHLnOe0x2KX4TmumeGbgFQFa61KbFmmuF6pD7k=; b=phn2oEaBQXLxIT3o6zvrBAhO66DRgL4pwIMR/QdvjEmtOIXKA4RxPzcuSf73xeiBL7fJGRnR TJQwvh2YZlLjTBcCbrXEgOJyOVi6RKO4vlpqFqTb+mnt355CXRd7nUCf1FQF9Tc2Nf18S2Ei 3/KqZlmCJglgQL1+v/vVu7UYC80= X-Mailgun-Sending-Ip: 198.61.254.9 X-Mailgun-Sid: WyI0MWYwYSIsICJsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n07.prod.us-east-1.postgun.com with SMTP id 606dcfb887ce1fbb5689d978 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Wed, 07 Apr 2021 15:28:56 GMT Sender: skakit=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 726C5C433ED; Wed, 7 Apr 2021 15:28:55 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: skakit) by smtp.codeaurora.org (Postfix) with ESMTPSA id E8FC1C433C6; Wed, 7 Apr 2021 15:28:54 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Wed, 07 Apr 2021 20:58:54 +0530 From: skakit@codeaurora.org To: Matthias Kaehlcke Cc: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kgunda@codeaurora.org Subject: Re: [PATCH V2 3/5] arm64: dts: qcom: pmk8350: Add PMIC peripherals for pmk8350 In-Reply-To: References: <1617268396-1837-1-git-send-email-skakit@codeaurora.org> <1617268396-1837-4-git-send-email-skakit@codeaurora.org> Message-ID: X-Sender: skakit@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2021-04-03 00:15, Matthias Kaehlcke wrote: > On Thu, Apr 01, 2021 at 02:43:14PM +0530, satya priya wrote: >> subject: arm64: dts: qcom: pmk8350: Add PMIC peripherals for pmk8350 > > same nit as for 1/5: maybe just 'arm64: dts: qcom: Add pml7350 > support/.dtsi' > or similar since this adds the initial .dtsi for the pmk8350? > >> Add PON, GPIO, RTC and other PMIC infra modules support for pmk8350. > I see that pmk8350 DT file is already added in linux-next. Only GPIO node has been added, will add remaining nodes and change commit text accordingly. > nit: also mention that it adds the pmk8350 .dtsi in the first place. > >> Signed-off-by: satya priya >> --- >> arch/arm64/boot/dts/qcom/pmk8350.dtsi | 100 >> ++++++++++++++++++++++++++++++++++ >> 1 file changed, 100 insertions(+) >> create mode 100644 arch/arm64/boot/dts/qcom/pmk8350.dtsi >> >> diff --git a/arch/arm64/boot/dts/qcom/pmk8350.dtsi >> b/arch/arm64/boot/dts/qcom/pmk8350.dtsi >> new file mode 100644 >> index 0000000..13631f2 >> --- /dev/null >> +++ b/arch/arm64/boot/dts/qcom/pmk8350.dtsi >> @@ -0,0 +1,100 @@ >> +// SPDX-License-Identifier: BSD-3-Clause >> +// Copyright (c) 2021, The Linux Foundation. All rights reserved. >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +&spmi_bus { >> + pmk8350: pmic@0 { >> + compatible = "qcom,pmk8350", "qcom,spmi-pmic"; > > Please provide a link to the binding if it has been sent. > >> + reg = <0x0 SPMI_USID>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + pmk8350_pon: pon@1300 { >> + compatible = "qcom,pm8998-pon"; >> + reg = <0x1300>; >> + >> + pwrkey { >> + compatible = "qcom,pmk8350-pwrkey"; >> + interrupts = <0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>; >> + linux,code = ; >> + }; >> + >> + resin { >> + compatible = "qcom,pmk8350-resin"; >> + interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>; >> + linux,code = ; >> + }; > > Is the usage of this keys really universal across different boards? > Yes, It is universal across different boards. > At least for the volume down key for most PMICs the config is in the > board file, which seems to make more sense. > >> + }; >> + >> + pmk8350_vadc: adc@3100 { >> + compatible = "qcom,spmi-adc7"; >> + reg = <0x3100>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; >> + interrupt-names = "eoc-int-en-set"; >> + #io-channel-cells = <1>; >> + io-channel-ranges; >> + >> + pmk8350_die_temp { >> + reg = ; >> + label = "pmk8350_die_temp"; >> + qcom,pre-scaling = <1 1>; >> + }; >> + >> + pm8350_die_temp { >> + reg = ; >> + label = "pm8350_die_temp"; >> + qcom,pre-scaling = <1 1>; >> + }; > > nit: I think this should be 'alphabetical' order, so 'pm8350_die_temp' > should > be before 'pmk8350_die_temp'. > Ok. >> + >> + pmr735a_die_temp { >> + reg = ; >> + label = "pmr735a_die_temp"; >> + qcom,pre-scaling = <1 1>; >> + }; >> + >> + pmr735b_die_temp { >> + reg = ; >> + label = "pmr735b_die_temp"; >> + qcom,pre-scaling = <1 1>; >> + }; > > Is it guaranteed that a board with the pmk8350 will always have the > other 3 PMICs? > No. Ok, will move this to idp board dts file. >> + }; >> + >> + pmk8350_adc_tm: adc-tm@3400 { >> + compatible = "qcom,adc-tm7"; >> + reg = <0x3400>; >> + interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>; >> + interrupt-names = "threshold"; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + #thermal-sensor-cells = <1>; >> + status = "disabled"; >> + }; >> + >> + pmk8350_gpios: gpios@b000 { >> + compatible = "qcom,pmk8350-gpio", "qcom,spmi-gpio"; >> + reg = <0xb000>; >> + gpio-controller; >> + gpio-ranges = <&pmk8350_gpios 0 0 4>; >> + #gpio-cells = <2>; >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + pmk8350_rtc: rtc@6100 { > > nit: nodes should be ordered by address, hence 'rtc@6100' should be > before > 'gpios@b000'. > Ok. >> + compatible = "qcom,pmk8350-rtc"; >> + reg = <0x6100>, <0x6200>; >> + reg-names = "rtc", "alarm"; >> + interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>; >> + }; >> + }; >> +};