From: isaku.yamahata@intel.com
To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com,
Paolo Bonzini <pbonzini@redhat.com>,
erdemaktas@google.com, Sean Christopherson <seanjc@google.com>,
Sagi Shahar <sagis@google.com>
Subject: [RFC PATCH v6 078/104] KVM: TDX: Implement interrupt injection
Date: Thu, 5 May 2022 11:15:12 -0700 [thread overview]
Message-ID: <ee87435c5ed87e0568c904bb29710f1463211ef7.1651774250.git.isaku.yamahata@intel.com> (raw)
In-Reply-To: <cover.1651774250.git.isaku.yamahata@intel.com>
From: Isaku Yamahata <isaku.yamahata@intel.com>
TDX supports interrupt inject into vcpu with posted interrupt. Wire up the
corresponding kvm x86 operations to posted interrupt. Move
kvm_vcpu_trigger_posted_interrupt() from vmx.c to common.h to share the
code.
VMX can inject interrupt by setting interrupt information field,
VM_ENTRY_INTR_INFO_FIELD, of VMCS. TDX supports interrupt injection only
by posted interrupt. Ignore the execution path to access
VM_ENTRY_INTR_INFO_FIELD.
As cpu state is protected and apicv is enabled for the TDX guest, VMM can
inject interrupt by updating posted interrupt descriptor. Treat interrupt
can be injected always.
Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
---
arch/x86/kvm/vmx/common.h | 71 ++++++++++++++++++++++++++
arch/x86/kvm/vmx/main.c | 92 ++++++++++++++++++++++++++++++----
arch/x86/kvm/vmx/posted_intr.c | 2 +-
arch/x86/kvm/vmx/posted_intr.h | 2 +
arch/x86/kvm/vmx/tdx.c | 25 +++++++++
arch/x86/kvm/vmx/vmx.c | 67 +------------------------
arch/x86/kvm/vmx/x86_ops.h | 7 ++-
7 files changed, 189 insertions(+), 77 deletions(-)
diff --git a/arch/x86/kvm/vmx/common.h b/arch/x86/kvm/vmx/common.h
index 235908f3e044..1522e9e6851b 100644
--- a/arch/x86/kvm/vmx/common.h
+++ b/arch/x86/kvm/vmx/common.h
@@ -4,6 +4,7 @@
#include <linux/kvm_host.h>
+#include "posted_intr.h"
#include "mmu.h"
static inline int __vmx_handle_ept_violation(struct kvm_vcpu *vcpu, gpa_t gpa,
@@ -30,4 +31,74 @@ static inline int __vmx_handle_ept_violation(struct kvm_vcpu *vcpu, gpa_t gpa,
return kvm_mmu_page_fault(vcpu, gpa, error_code, NULL, 0);
}
+static inline void kvm_vcpu_trigger_posted_interrupt(struct kvm_vcpu *vcpu,
+ int pi_vec)
+{
+#ifdef CONFIG_SMP
+ if (vcpu->mode == IN_GUEST_MODE) {
+ /*
+ * The vector of the virtual has already been set in the PIR.
+ * Send a notification event to deliver the virtual interrupt
+ * unless the vCPU is the currently running vCPU, i.e. the
+ * event is being sent from a fastpath VM-Exit handler, in
+ * which case the PIR will be synced to the vIRR before
+ * re-entering the guest.
+ *
+ * When the target is not the running vCPU, the following
+ * possibilities emerge:
+ *
+ * Case 1: vCPU stays in non-root mode. Sending a notification
+ * event posts the interrupt to the vCPU.
+ *
+ * Case 2: vCPU exits to root mode and is still runnable. The
+ * PIR will be synced to the vIRR before re-entering the guest.
+ * Sending a notification event is ok as the host IRQ handler
+ * will ignore the spurious event.
+ *
+ * Case 3: vCPU exits to root mode and is blocked. vcpu_block()
+ * has already synced PIR to vIRR and never blocks the vCPU if
+ * the vIRR is not empty. Therefore, a blocked vCPU here does
+ * not wait for any requested interrupts in PIR, and sending a
+ * notification event also results in a benign, spurious event.
+ */
+
+ if (vcpu != kvm_get_running_vcpu())
+ apic->send_IPI_mask(get_cpu_mask(vcpu->cpu), pi_vec);
+ return;
+ }
+#endif
+ /*
+ * The vCPU isn't in the guest; wake the vCPU in case it is blocking,
+ * otherwise do nothing as KVM will grab the highest priority pending
+ * IRQ via ->sync_pir_to_irr() in vcpu_enter_guest().
+ */
+ kvm_vcpu_wake_up(vcpu);
+}
+
+/*
+ * Send interrupt to vcpu via posted interrupt way.
+ * 1. If target vcpu is running(non-root mode), send posted interrupt
+ * notification to vcpu and hardware will sync PIR to vIRR atomically.
+ * 2. If target vcpu isn't running(root mode), kick it to pick up the
+ * interrupt from PIR in next vmentry.
+ */
+static inline void __vmx_deliver_posted_interrupt(
+ struct kvm_vcpu *vcpu, struct pi_desc *pi_desc, int vector)
+{
+ if (pi_test_and_set_pir(vector, pi_desc))
+ return;
+
+ /* If a previous notification has sent the IPI, nothing to do. */
+ if (pi_test_and_set_on(pi_desc))
+ return;
+
+ /*
+ * The implied barrier in pi_test_and_set_on() pairs with the smp_mb_*()
+ * after setting vcpu->mode in vcpu_enter_guest(), thus the vCPU is
+ * guaranteed to see PID.ON=1 and sync the PIR to IRR if triggering a
+ * posted interrupt "fails" because vcpu->mode != IN_GUEST_MODE.
+ */
+ kvm_vcpu_trigger_posted_interrupt(vcpu, POSTED_INTR_VECTOR);
+}
+
#endif /* __KVM_X86_VMX_COMMON_H */
diff --git a/arch/x86/kvm/vmx/main.c b/arch/x86/kvm/vmx/main.c
index f14519c6a861..613791b50f55 100644
--- a/arch/x86/kvm/vmx/main.c
+++ b/arch/x86/kvm/vmx/main.c
@@ -188,6 +188,33 @@ static bool vt_protected_apic_has_interrupt(struct kvm_vcpu *vcpu)
return tdx_protected_apic_has_interrupt(vcpu);
}
+static void vt_apicv_post_state_restore(struct kvm_vcpu *vcpu)
+{
+ struct pi_desc *pi = vcpu_to_pi_desc(vcpu);
+ pi_clear_on(pi);
+ memset(pi->pir, 0, sizeof(pi->pir));
+}
+
+static int vt_sync_pir_to_irr(struct kvm_vcpu *vcpu)
+{
+ if (is_td_vcpu(vcpu))
+ return -1;
+
+ return vmx_sync_pir_to_irr(vcpu);
+}
+
+static void vt_deliver_interrupt(struct kvm_lapic *apic, int delivery_mode,
+ int trig_mode, int vector)
+{
+ if (is_td_vcpu(apic->vcpu)) {
+ tdx_deliver_interrupt(apic, delivery_mode, trig_mode,
+ vector);
+ return;
+ }
+
+ vmx_deliver_interrupt(apic, delivery_mode, trig_mode, vector);
+}
+
static void vt_flush_tlb_all(struct kvm_vcpu *vcpu)
{
if (is_td_vcpu(vcpu))
@@ -237,6 +264,53 @@ static void vt_sched_in(struct kvm_vcpu *vcpu, int cpu)
vmx_sched_in(vcpu, cpu);
}
+static void vt_set_interrupt_shadow(struct kvm_vcpu *vcpu, int mask)
+{
+ if (is_td_vcpu(vcpu))
+ return;
+ vmx_set_interrupt_shadow(vcpu, mask);
+}
+
+static u32 vt_get_interrupt_shadow(struct kvm_vcpu *vcpu)
+{
+ if (is_td_vcpu(vcpu))
+ return 0;
+
+ return vmx_get_interrupt_shadow(vcpu);
+}
+
+static void vt_inject_irq(struct kvm_vcpu *vcpu)
+{
+ if (is_td_vcpu(vcpu))
+ return;
+
+ vmx_inject_irq(vcpu);
+}
+
+static void vt_cancel_injection(struct kvm_vcpu *vcpu)
+{
+ if (is_td_vcpu(vcpu))
+ return;
+
+ vmx_cancel_injection(vcpu);
+}
+
+static int vt_interrupt_allowed(struct kvm_vcpu *vcpu, bool for_injection)
+{
+ if (is_td_vcpu(vcpu))
+ return true;
+
+ return vmx_interrupt_allowed(vcpu, for_injection);
+}
+
+static void vt_enable_irq_window(struct kvm_vcpu *vcpu)
+{
+ if (is_td_vcpu(vcpu))
+ return;
+
+ vmx_enable_irq_window(vcpu);
+}
+
static int vt_mem_enc_ioctl(struct kvm *kvm, void __user *argp)
{
if (!is_td(kvm))
@@ -313,31 +387,31 @@ struct kvm_x86_ops vt_x86_ops __initdata = {
.handle_exit = vmx_handle_exit,
.skip_emulated_instruction = vmx_skip_emulated_instruction,
.update_emulated_instruction = vmx_update_emulated_instruction,
- .set_interrupt_shadow = vmx_set_interrupt_shadow,
- .get_interrupt_shadow = vmx_get_interrupt_shadow,
+ .set_interrupt_shadow = vt_set_interrupt_shadow,
+ .get_interrupt_shadow = vt_get_interrupt_shadow,
.patch_hypercall = vmx_patch_hypercall,
- .inject_irq = vmx_inject_irq,
+ .inject_irq = vt_inject_irq,
.inject_nmi = vmx_inject_nmi,
.queue_exception = vmx_queue_exception,
- .cancel_injection = vmx_cancel_injection,
- .interrupt_allowed = vmx_interrupt_allowed,
+ .cancel_injection = vt_cancel_injection,
+ .interrupt_allowed = vt_interrupt_allowed,
.nmi_allowed = vmx_nmi_allowed,
.get_nmi_mask = vmx_get_nmi_mask,
.set_nmi_mask = vmx_set_nmi_mask,
.enable_nmi_window = vmx_enable_nmi_window,
- .enable_irq_window = vmx_enable_irq_window,
+ .enable_irq_window = vt_enable_irq_window,
.update_cr8_intercept = vmx_update_cr8_intercept,
.set_virtual_apic_mode = vmx_set_virtual_apic_mode,
.set_apic_access_page_addr = vmx_set_apic_access_page_addr,
.refresh_apicv_exec_ctrl = vmx_refresh_apicv_exec_ctrl,
.load_eoi_exitmap = vmx_load_eoi_exitmap,
- .apicv_post_state_restore = vmx_apicv_post_state_restore,
+ .apicv_post_state_restore = vt_apicv_post_state_restore,
.check_apicv_inhibit_reasons = vmx_check_apicv_inhibit_reasons,
.hwapic_irr_update = vmx_hwapic_irr_update,
.hwapic_isr_update = vmx_hwapic_isr_update,
.guest_apic_has_interrupt = vmx_guest_apic_has_interrupt,
- .sync_pir_to_irr = vmx_sync_pir_to_irr,
- .deliver_interrupt = vmx_deliver_interrupt,
+ .sync_pir_to_irr = vt_sync_pir_to_irr,
+ .deliver_interrupt = vt_deliver_interrupt,
.dy_apicv_has_pending_interrupt = pi_has_pending_interrupt,
.protected_apic_has_interrupt = vt_protected_apic_has_interrupt,
diff --git a/arch/x86/kvm/vmx/posted_intr.c b/arch/x86/kvm/vmx/posted_intr.c
index 0bc7a848b319..50cabc8c93c1 100644
--- a/arch/x86/kvm/vmx/posted_intr.c
+++ b/arch/x86/kvm/vmx/posted_intr.c
@@ -50,7 +50,7 @@ static inline struct vcpu_pi *vcpu_to_pi(struct kvm_vcpu *vcpu)
return (struct vcpu_pi*)vcpu;
}
-static inline struct pi_desc *vcpu_to_pi_desc(struct kvm_vcpu *vcpu)
+struct pi_desc *vcpu_to_pi_desc(struct kvm_vcpu *vcpu)
{
return &vcpu_to_pi(vcpu)->pi_desc;
}
diff --git a/arch/x86/kvm/vmx/posted_intr.h b/arch/x86/kvm/vmx/posted_intr.h
index 2fe8222308b2..0f9983b6910b 100644
--- a/arch/x86/kvm/vmx/posted_intr.h
+++ b/arch/x86/kvm/vmx/posted_intr.h
@@ -105,6 +105,8 @@ struct vcpu_pi {
/* Until here common layout betwwn vcpu_vmx and vcpu_tdx. */
};
+struct pi_desc *vcpu_to_pi_desc(struct kvm_vcpu *vcpu);
+
void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu);
void vmx_vcpu_pi_put(struct kvm_vcpu *vcpu);
void pi_wakeup_handler(void);
diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c
index 758af6ec3507..55acf6f1b1a3 100644
--- a/arch/x86/kvm/vmx/tdx.c
+++ b/arch/x86/kvm/vmx/tdx.c
@@ -7,6 +7,7 @@
#include "capabilities.h"
#include "x86_ops.h"
+#include "common.h"
#include "mmu.h"
#include "tdx.h"
#include "vmx.h"
@@ -555,6 +556,9 @@ int tdx_vcpu_create(struct kvm_vcpu *vcpu)
vcpu->arch.guest_state_protected =
!(to_kvm_tdx(vcpu->kvm)->attributes & TDX_TD_ATTRIBUTE_DEBUG);
+ tdx->pi_desc.nv = POSTED_INTR_VECTOR;
+ tdx->pi_desc.sn = 1;
+
tdx->host_state_need_save = true;
tdx->host_state_need_restore = false;
@@ -575,6 +579,7 @@ void tdx_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
{
struct vcpu_tdx *tdx = to_tdx(vcpu);
+ vmx_vcpu_pi_load(vcpu, cpu);
if (vcpu->cpu == cpu)
return;
@@ -788,6 +793,12 @@ fastpath_t tdx_vcpu_run(struct kvm_vcpu *vcpu)
trace_kvm_entry(vcpu);
+ if (pi_test_on(&tdx->pi_desc)) {
+ apic->send_IPI_self(POSTED_INTR_VECTOR);
+
+ kvm_wait_lapic_expire(vcpu);
+ }
+
tdx_vcpu_enter_exit(vcpu, tdx);
tdx_user_return_update_cache();
@@ -1126,6 +1137,16 @@ static void tdx_handle_changed_private_spte(
}
}
+void tdx_deliver_interrupt(struct kvm_lapic *apic, int delivery_mode,
+ int trig_mode, int vector)
+{
+ struct kvm_vcpu *vcpu = apic->vcpu;
+ struct vcpu_tdx *tdx = to_tdx(vcpu);
+
+ /* TDX supports only posted interrupt. No lapic emulation. */
+ __vmx_deliver_posted_interrupt(vcpu, &tdx->pi_desc, vector);
+}
+
int tdx_dev_ioctl(void __user *argp)
{
struct kvm_tdx_capabilities __user *user_caps;
@@ -1561,6 +1582,10 @@ int tdx_vcpu_ioctl(struct kvm_vcpu *vcpu, void __user *argp)
return -EIO;
}
+ td_vmcs_write16(tdx, POSTED_INTR_NV, POSTED_INTR_VECTOR);
+ td_vmcs_write64(tdx, POSTED_INTR_DESC_ADDR, __pa(&tdx->pi_desc));
+ td_vmcs_setbit32(tdx, PIN_BASED_VM_EXEC_CONTROL, PIN_BASED_POSTED_INTR);
+
tdx->initialized = true;
return 0;
}
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index df78e2220fec..718b38239e03 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -3951,50 +3951,6 @@ void vmx_msr_filter_changed(struct kvm_vcpu *vcpu)
pt_update_intercept_for_msr(vcpu);
}
-static inline void kvm_vcpu_trigger_posted_interrupt(struct kvm_vcpu *vcpu,
- int pi_vec)
-{
-#ifdef CONFIG_SMP
- if (vcpu->mode == IN_GUEST_MODE) {
- /*
- * The vector of the virtual has already been set in the PIR.
- * Send a notification event to deliver the virtual interrupt
- * unless the vCPU is the currently running vCPU, i.e. the
- * event is being sent from a fastpath VM-Exit handler, in
- * which case the PIR will be synced to the vIRR before
- * re-entering the guest.
- *
- * When the target is not the running vCPU, the following
- * possibilities emerge:
- *
- * Case 1: vCPU stays in non-root mode. Sending a notification
- * event posts the interrupt to the vCPU.
- *
- * Case 2: vCPU exits to root mode and is still runnable. The
- * PIR will be synced to the vIRR before re-entering the guest.
- * Sending a notification event is ok as the host IRQ handler
- * will ignore the spurious event.
- *
- * Case 3: vCPU exits to root mode and is blocked. vcpu_block()
- * has already synced PIR to vIRR and never blocks the vCPU if
- * the vIRR is not empty. Therefore, a blocked vCPU here does
- * not wait for any requested interrupts in PIR, and sending a
- * notification event also results in a benign, spurious event.
- */
-
- if (vcpu != kvm_get_running_vcpu())
- apic->send_IPI_mask(get_cpu_mask(vcpu->cpu), pi_vec);
- return;
- }
-#endif
- /*
- * The vCPU isn't in the guest; wake the vCPU in case it is blocking,
- * otherwise do nothing as KVM will grab the highest priority pending
- * IRQ via ->sync_pir_to_irr() in vcpu_enter_guest().
- */
- kvm_vcpu_wake_up(vcpu);
-}
-
static int vmx_deliver_nested_posted_interrupt(struct kvm_vcpu *vcpu,
int vector)
{
@@ -4046,20 +4002,7 @@ static int vmx_deliver_posted_interrupt(struct kvm_vcpu *vcpu, int vector)
if (!vcpu->arch.apicv_active)
return -1;
- if (pi_test_and_set_pir(vector, &vmx->pi_desc))
- return 0;
-
- /* If a previous notification has sent the IPI, nothing to do. */
- if (pi_test_and_set_on(&vmx->pi_desc))
- return 0;
-
- /*
- * The implied barrier in pi_test_and_set_on() pairs with the smp_mb_*()
- * after setting vcpu->mode in vcpu_enter_guest(), thus the vCPU is
- * guaranteed to see PID.ON=1 and sync the PIR to IRR if triggering a
- * posted interrupt "fails" because vcpu->mode != IN_GUEST_MODE.
- */
- kvm_vcpu_trigger_posted_interrupt(vcpu, POSTED_INTR_VECTOR);
+ __vmx_deliver_posted_interrupt(vcpu, &vmx->pi_desc, vector);
return 0;
}
@@ -6600,14 +6543,6 @@ void vmx_load_eoi_exitmap(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap)
vmcs_write64(EOI_EXIT_BITMAP3, eoi_exit_bitmap[3]);
}
-void vmx_apicv_post_state_restore(struct kvm_vcpu *vcpu)
-{
- struct vcpu_vmx *vmx = to_vmx(vcpu);
-
- pi_clear_on(&vmx->pi_desc);
- memset(vmx->pi_desc.pir, 0, sizeof(vmx->pi_desc.pir));
-}
-
void vmx_do_interrupt_nmi_irqoff(unsigned long entry);
static void handle_interrupt_nmi_irqoff(struct kvm_vcpu *vcpu,
diff --git a/arch/x86/kvm/vmx/x86_ops.h b/arch/x86/kvm/vmx/x86_ops.h
index d1face47f547..3eeb35dee8cf 100644
--- a/arch/x86/kvm/vmx/x86_ops.h
+++ b/arch/x86/kvm/vmx/x86_ops.h
@@ -53,7 +53,6 @@ int vmx_check_intercept(struct kvm_vcpu *vcpu,
bool vmx_apic_init_signal_blocked(struct kvm_vcpu *vcpu);
void vmx_migrate_timers(struct kvm_vcpu *vcpu);
void vmx_set_virtual_apic_mode(struct kvm_vcpu *vcpu);
-void vmx_apicv_post_state_restore(struct kvm_vcpu *vcpu);
bool vmx_check_apicv_inhibit_reasons(enum kvm_apicv_inhibit reason);
void vmx_hwapic_irr_update(struct kvm_vcpu *vcpu, int max_irr);
void vmx_hwapic_isr_update(struct kvm_vcpu *vcpu, int max_isr);
@@ -149,6 +148,9 @@ void tdx_vcpu_put(struct kvm_vcpu *vcpu);
void tdx_vcpu_load(struct kvm_vcpu *vcpu, int cpu);
bool tdx_protected_apic_has_interrupt(struct kvm_vcpu *vcpu);
+void tdx_deliver_interrupt(struct kvm_lapic *apic, int delivery_mode,
+ int trig_mode, int vector);
+
int tdx_vm_ioctl(struct kvm *kvm, void __user *argp);
int tdx_vcpu_ioctl(struct kvm_vcpu *vcpu, void __user *argp);
@@ -176,6 +178,9 @@ static inline void tdx_vcpu_put(struct kvm_vcpu *vcpu) {}
static inline void tdx_vcpu_load(struct kvm_vcpu *vcpu, int cpu) {}
static inline bool tdx_protected_apic_has_interrupt(struct kvm_vcpu *vcpu) { return false; }
+static inline void tdx_deliver_interrupt(
+ struct kvm_lapic *apic, int delivery_mode, int trig_mode, int vector) {}
+
static inline int tdx_vm_ioctl(struct kvm *kvm, void __user *argp) { return -EOPNOTSUPP; }
static inline int tdx_vcpu_ioctl(struct kvm_vcpu *vcpu, void __user *argp) { return -EOPNOTSUPP; }
--
2.25.1
next prev parent reply other threads:[~2022-05-05 18:19 UTC|newest]
Thread overview: 146+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-05 18:13 [RFC PATCH v6 000/104] KVM TDX basic feature support isaku.yamahata
2022-05-05 18:13 ` [RFC PATCH v6 001/104] KVM: x86: Move check_processor_compatibility from init ops to runtime ops isaku.yamahata
2022-05-05 18:13 ` [RFC PATCH v6 002/104] Partially revert "KVM: Pass kvm_init()'s opaque param to additional arch funcs" isaku.yamahata
2022-05-05 18:13 ` [RFC PATCH v6 003/104] KVM: Refactor CPU compatibility check on module initialiization isaku.yamahata
2022-05-23 22:27 ` Sagi Shahar
2022-05-26 19:03 ` Isaku Yamahata
2022-05-05 18:13 ` [RFC PATCH v6 004/104] KVM: VMX: Move out vmx_x86_ops to 'main.c' to wrap VMX and TDX isaku.yamahata
2022-05-05 18:13 ` [RFC PATCH v6 005/104] x86/virt/vmx/tdx: export platform_has_tdx isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 006/104] KVM: TDX: Detect CPU feature on kernel module initialization isaku.yamahata
2022-05-23 23:47 ` Sagi Shahar
2022-05-26 19:28 ` Isaku Yamahata
2022-06-01 22:11 ` Kai Huang
2022-05-05 18:14 ` [RFC PATCH v6 007/104] KVM: Enable hardware before doing arch VM initialization isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 008/104] KVM: x86: Refactor KVM VMX module init/exit functions isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 009/104] KVM: TDX: Add placeholders for TDX VM/vcpu structure isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 010/104] x86/virt/tdx: Add a helper function to return system wide info about TDX module isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 011/104] KVM: TDX: Initialize TDX module when loading kvm_intel.ko isaku.yamahata
2022-05-06 13:57 ` Xiaoyao Li
2022-05-06 21:29 ` Isaku Yamahata
2022-05-05 18:14 ` [RFC PATCH v6 012/104] KVM: x86: Introduce vm_type to differentiate default VMs from confidential VMs isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 013/104] KVM: TDX: Make TDX VM type supported isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 014/104] [MARKER] The start of TDX KVM patch series: TDX architectural definitions isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 015/104] KVM: TDX: Define " isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 016/104] KVM: TDX: Add TDX "architectural" error codes isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 017/104] KVM: TDX: Add C wrapper functions for SEAMCALLs to the TDX module isaku.yamahata
2022-05-06 8:56 ` Xiaoyao Li
2022-05-06 21:35 ` Isaku Yamahata
2022-05-05 18:14 ` [RFC PATCH v6 018/104] KVM: TDX: Add helper functions to print TDX SEAMCALL error isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 019/104] [MARKER] The start of TDX KVM patch series: TD VM creation/destruction isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 020/104] KVM: TDX: Stub in tdx.h with structs, accessors, and VMCS helpers isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 021/104] x86/cpu: Add helper functions to allocate/free TDX private host key id isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 022/104] KVM: TDX: create/destroy VM structure isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 023/104] KVM: TDX: x86: Add ioctl to get TDX systemwide parameters isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 024/104] KVM: TDX: Add place holder for TDX VM specific mem_enc_op ioctl isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 025/104] KVM: TDX: initialize VM with TDX specific parameters isaku.yamahata
2022-05-06 5:27 ` Xiaoyao Li
2022-05-06 13:54 ` Xiaoyao Li
2022-05-09 15:18 ` Isaku Yamahata
2022-05-13 12:34 ` Kai Huang
2022-05-05 18:14 ` [RFC PATCH v6 026/104] KVM: TDX: Make KVM_CAP_SET_IDENTITY_MAP_ADDR unsupported for TDX isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 027/104] KVM: TDX: Make pmu_intel.c ignore guest TD case isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 028/104] [MARKER] The start of TDX KVM patch series: TD vcpu creation/destruction isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 029/104] KVM: TDX: allocate/free TDX vcpu structure isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 030/104] " isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 031/104] KVM: TDX: Do TDX specific vcpu initialization isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 032/104] [MARKER] The start of TDX KVM patch series: KVM MMU GPA shared bits isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 033/104] KVM: x86/mmu: introduce config for PRIVATE KVM MMU isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 034/104] KVM: x86/mmu: Add address conversion functions for TDX shared bits isaku.yamahata
2022-05-10 0:16 ` Kai Huang
2022-05-12 9:50 ` Isaku Yamahata
2022-05-05 18:14 ` [RFC PATCH v6 035/104] [MARKER] The start of TDX KVM patch series: KVM TDP refactoring for TDX isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 036/104] KVM: x86/mmu: Explicitly check for MMIO spte in fast page fault isaku.yamahata
2022-08-01 22:27 ` David Matlack
2022-08-01 23:27 ` Sean Christopherson
2022-08-02 1:46 ` Huang, Kai
2022-08-02 16:34 ` David Matlack
2022-08-03 0:28 ` Kai Huang
2022-05-05 18:14 ` [RFC PATCH v6 037/104] KVM: x86/mmu: Allow non-zero value for non-present SPTE isaku.yamahata
2022-08-04 22:54 ` David Matlack
2022-08-04 23:18 ` David Matlack
2022-08-05 0:03 ` Huang, Kai
2022-08-05 16:46 ` David Matlack
2022-08-05 17:14 ` Sean Christopherson
2022-08-04 23:23 ` Sean Christopherson
2022-08-04 23:43 ` David Matlack
2022-05-05 18:14 ` [RFC PATCH v6 038/104] KVM: x86/mmu: Track shadow MMIO value/mask on a per-VM basis isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 039/104] KVM: x86/mmu: Disallow fast page fault on private GPA isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 040/104] KVM: x86/mmu: Allow per-VM override of the TDP max page level isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 041/104] KVM: x86/mmu: Zap only leaf SPTEs for deleted/moved memslot for private mmu isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 042/104] KVM: VMX: Introduce test mode related to EPT violation VE isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 043/104] [MARKER] The start of TDX KVM patch series: KVM TDP MMU hooks isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 044/104] KVM: x86/mmu: Focibly use TDP MMU for TDX isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 045/104] KVM: x86/mmu: Add a private pointer to struct kvm_mmu_page isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 046/104] KVM: x86/tdp_mmu: refactor kvm_tdp_mmu_map() isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 047/104] KVM: x86/tdp_mmu: Support TDX private mapping for TDP MMU isaku.yamahata
2022-05-27 17:38 ` Paolo Bonzini
2022-06-01 20:49 ` Isaku Yamahata
2022-05-05 18:14 ` [RFC PATCH v6 048/104] [MARKER] The start of TDX KVM patch series: TDX EPT violation isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 049/104] KVM: x86/mmu: Disallow dirty logging for x86 TDX isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 050/104] KVM: x86/tdp_mmu: Ignore unsupported mmu operation on private GFNs isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 051/104] KVM: VMX: Split out guts of EPT violation to common/exposed function isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 052/104] KVM: VMX: Move setting of EPT MMU masks to common VT-x code isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 053/104] KVM: TDX: Add load_mmu_pgd method for TDX isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 054/104] KVM: TDX: don't request KVM_REQ_APIC_PAGE_RELOAD isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 055/104] KVM: TDX: TDP MMU TDX support isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 056/104] [MARKER] The start of TDX KVM patch series: KVM TDP MMU MapGPA isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 057/104] KVM: x86/mmu: steal software usable git to record if GFN is for shared or not isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 058/104] KVM: x86/tdp_mmu: implement MapGPA hypercall for TDX isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 059/104] KVM: x86/mmu: Introduce kvm_mmu_map_tdp_page() for use by TDX isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 060/104] [MARKER] The start of TDX KVM patch series: TD finalization isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 061/104] KVM: TDX: Create initial guest memory isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 062/104] KVM: TDX: Finalize VM initialization isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 063/104] [MARKER] The start of TDX KVM patch series: TD vcpu enter/exit isaku.yamahata
2022-05-05 18:14 ` [RFC PATCH v6 064/104] KVM: TDX: Add helper assembly function to TDX vcpu isaku.yamahata
2022-05-31 15:58 ` Paolo Bonzini
2022-06-01 20:50 ` Isaku Yamahata
2022-05-05 18:14 ` [RFC PATCH v6 065/104] KVM: TDX: Implement TDX vcpu enter/exit path isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 066/104] KVM: TDX: vcpu_run: save/restore host state(host kernel gs) isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 067/104] KVM: TDX: restore host xsave state when exit from the guest TD isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 068/104] KVM: x86: Allow to update cached values in kvm_user_return_msrs w/o wrmsr isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 069/104] KVM: TDX: restore user ret MSRs isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 070/104] [MARKER] The start of TDX KVM patch series: TD vcpu exits/interrupts/hypercalls isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 071/104] KVM: TDX: complete interrupts after tdexit isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 072/104] KVM: TDX: restore debug store when TD exit isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 073/104] KVM: TDX: handle vcpu migration over logical processor isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 074/104] KVM: x86: Add a switch_db_regs flag to handle TDX's auto-switched behavior isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 075/104] KVM: TDX: Add support for find pending IRQ in a protected local APIC isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 076/104] KVM: x86: Assume timer IRQ was injected if APIC state is proteced isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 077/104] KVM: TDX: remove use of struct vcpu_vmx from posted_interrupt.c isaku.yamahata
2022-05-05 18:15 ` isaku.yamahata [this message]
2022-05-05 18:15 ` [RFC PATCH v6 079/104] KVM: TDX: Implements vcpu request_immediate_exit isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 080/104] KVM: TDX: Implement methods to inject NMI isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 081/104] KVM: VMX: Modify NMI and INTR handlers to take intr_info as function argument isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 082/104] KVM: VMX: Move NMI/exception handler to common helper isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 083/104] KVM: x86: Split core of hypercall emulation to helper function isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 084/104] KVM: TDX: Add a place holder to handle TDX VM exit isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 085/104] KVM: TDX: handle EXIT_REASON_OTHER_SMI isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 086/104] KVM: TDX: handle ept violation/misconfig exit isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 087/104] KVM: TDX: handle EXCEPTION_NMI and EXTERNAL_INTERRUPT isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 088/104] KVM: TDX: Add a place holder for handler of TDX hypercalls (TDG.VP.VMCALL) isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 089/104] KVM: TDX: handle KVM hypercall with TDG.VP.VMCALL isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 090/104] KVM: TDX: Handle TDX PV CPUID hypercall isaku.yamahata
2022-06-14 18:15 ` Sagi Shahar
2022-06-29 10:13 ` Isaku Yamahata
2022-07-18 22:37 ` Sagi Shahar
2022-07-19 19:23 ` Sean Christopherson
2022-05-05 18:15 ` [RFC PATCH v6 091/104] KVM: TDX: Handle TDX PV HLT hypercall isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 092/104] KVM: TDX: Handle TDX PV port io hypercall isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 093/104] KVM: TDX: Handle TDX PV MMIO hypercall isaku.yamahata
2022-06-14 18:08 ` Sagi Shahar
2022-06-29 10:17 ` Isaku Yamahata
2022-05-05 18:15 ` [RFC PATCH v6 094/104] KVM: TDX: Implement callbacks for MSR operations for TDX isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 095/104] KVM: TDX: Handle TDX PV rdmsr/wrmsr hypercall isaku.yamahata
2022-06-10 21:04 ` Sagi Shahar
2022-06-29 10:24 ` Isaku Yamahata
2022-05-05 18:15 ` [RFC PATCH v6 096/104] KVM: TDX: Handle TDX PV report fatal error hypercall isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 097/104] KVM: TDX: Handle TDX PV map_gpa hypercall isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 098/104] KVM: TDX: Handle TDG.VP.VMCALL<GetTdVmCallInfo> hypercall isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 099/104] KVM: TDX: Silently discard SMI request isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 100/104] KVM: TDX: Silently ignore INIT/SIPI isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 101/104] KVM: TDX: Add methods to ignore accesses to CPU state isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 102/104] Documentation/virtual/kvm: Document on Trust Domain Extensions(TDX) isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 103/104] KVM: x86: design documentation on TDX support of x86 KVM TDP MMU isaku.yamahata
2022-05-05 18:15 ` [RFC PATCH v6 104/104] [MARKER] the end of (the first phase of) TDX KVM patch series isaku.yamahata
2022-05-31 14:46 ` [RFC PATCH v6 000/104] KVM TDX basic feature support Paolo Bonzini
2022-06-01 20:53 ` Isaku Yamahata
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