linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Scott Wood <oss@buserror.net>
To: Wang Wenhu <wenhu.wang@vivo.com>,
	gregkh@linuxfoundation.org, linux-kernel@vger.kernel.org,
	christophe.leroy@c-s.fr, linuxppc-dev@lists.ozlabs.org
Cc: kernel@vivo.com, Michael Ellerman <mpe@ellerman.id.au>
Subject: Re: [PATCH v2,5/5] drivers: uio: new driver for fsl_85xx_cache_sram
Date: Wed, 15 Apr 2020 14:26:55 -0500	[thread overview]
Message-ID: <ef9f59f98f6bcf81891de87fd9cd0b5973bbd468.camel@buserror.net> (raw)
In-Reply-To: <20200415152442.122873-6-wenhu.wang@vivo.com>

On Wed, 2020-04-15 at 08:24 -0700, Wang Wenhu wrote:
> +static const struct of_device_id uio_mpc85xx_l2ctlr_of_match[] = {
> +	{	.compatible = "uio,fsl,p2020-l2-cache-controller",	},
> +	{	.compatible = "uio,fsl,p2010-l2-cache-controller",	},
> +	{	.compatible = "uio,fsl,p1020-l2-cache-controller",	},
> +	{	.compatible = "uio,fsl,p1011-l2-cache-controller",	},
> +	{	.compatible = "uio,fsl,p1013-l2-cache-controller",	},
> +	{	.compatible = "uio,fsl,p1022-l2-cache-controller",	},
> +	{	.compatible = "uio,fsl,mpc8548-l2-cache-controller",	},
> +	{	.compatible = "uio,fsl,mpc8544-l2-cache-controller",	},
> +	{	.compatible = "uio,fsl,mpc8572-l2-cache-controller",	},
> +	{	.compatible = "uio,fsl,mpc8536-l2-cache-controller",	},
> +	{	.compatible = "uio,fsl,p1021-l2-cache-controller",	},
> +	{	.compatible = "uio,fsl,p1012-l2-cache-controller",	},
> +	{	.compatible = "uio,fsl,p1025-l2-cache-controller",	},
> +	{	.compatible = "uio,fsl,p1016-l2-cache-controller",	},
> +	{	.compatible = "uio,fsl,p1024-l2-cache-controller",	},
> +	{	.compatible = "uio,fsl,p1015-l2-cache-controller",	},
> +	{	.compatible = "uio,fsl,p1010-l2-cache-controller",	},
> +	{	.compatible = "uio,fsl,bsc9131-l2-cache-controller",	},
> +	{},
> +};

NACK

The device tree describes the hardware, not what driver you want to bind the
hardware to, or how you want to allocate the resources.  And even if defining
nodes for sram allocation were the right way to go, why do you have a separate
compatible for each chip when you're just describing software configuration?

Instead, have module parameters that take the sizes and alignments you'd like
to allocate and expose to userspace.  Better still would be some sort of
dynamic allocation (e.g. open a fd, ioctl to set the requested size/alignment,
if it succeeds you can mmap it, and when the fd is closed the region is
freed).

-Scott



  parent reply	other threads:[~2020-04-15 19:29 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-15 12:33 [PATCH 0/5] drivers: uio: new driver uio_fsl_85xx_cache_sram Wang Wenhu
2020-04-15 12:33 ` [PATCH 1/5] powerpc: 85xx: make FSL_85XX_CACHE_SRAM configurable Wang Wenhu
2020-04-16  0:58   ` kbuild test robot
2020-04-15 12:33 ` [PATCH 2/5] powerpc: sysdev: fix compile error for fsl_85xx_cache_sram Wang Wenhu
2020-04-15 12:33 ` [PATCH 3/5] powerpc: sysdev: fix compile warning " Wang Wenhu
2020-04-15 12:33 ` [PATCH 4/5] powerpc: sysdev: fix compile error for fsl_85xx_l2ctlr Wang Wenhu
2020-04-15 12:33 ` [PATCH 5/5] drivers: uio: new driver for fsl_85xx_cache_sram Wang Wenhu
2020-04-15 12:49   ` Greg KH
2020-04-15 14:07     ` [PATCH 5/5] drivers: uio: new driver for fsl_85xx_cache_sram>On Wed, Apr 15, 2020 at 05:33:46AM -0700, Wang Wenhu wrote: Wang Wenhu
2020-04-15 15:24     ` [PATCH v2,0/5] drivers: uio: new driver uio_fsl_85xx_cache_sram Wang Wenhu
2020-04-15 15:24       ` [PATCH v2,1/5] powerpc: 85xx: make FSL_85XX_CACHE_SRAM configurable Wang Wenhu
2020-04-15 16:26         ` Christophe Leroy
2020-04-15 16:29         ` Christophe Leroy
2020-04-15 18:53         ` Scott Wood
2020-04-16  4:11           ` Wang Wenhu
2020-04-15 15:24       ` [PATCH v2,2/5] powerpc: sysdev: fix compile error for fsl_85xx_cache_sram Wang Wenhu
2020-04-15 15:24       ` [PATCH v2,3/5] powerpc: sysdev: fix compile warning " Wang Wenhu
2020-04-15 15:24       ` [PATCH v2,4/5] powerpc: sysdev: fix compile error for fsl_85xx_l2ctlr Wang Wenhu
2020-04-15 15:24       ` [PATCH v2,5/5] drivers: uio: new driver for fsl_85xx_cache_sram Wang Wenhu
2020-04-15 16:52         ` Christophe Leroy
2020-04-15 19:27           ` Scott Wood
2020-04-16  6:30             ` Greg KH
2020-04-16 19:36               ` Scott Wood
2020-04-16  5:22           ` Wang Wenhu
2020-04-16  6:02             ` Christophe Leroy
2020-04-15 19:26         ` Scott Wood [this message]
2020-04-16  6:30           ` Greg KH
2020-04-16 19:40             ` Scott Wood
2020-04-16  7:29       ` [PATCH v3,0/4] drivers: uio: new driver uio_fsl_85xx_cache_sram Wang Wenhu
2020-04-16  7:29         ` [PATCH v3,1/4] powerpc: sysdev: fix compile error for fsl_85xx_l2ctlr Wang Wenhu
2020-04-16  7:29         ` [PATCH v3,2/4] powerpc: sysdev: fix compile error for fsl_85xx_cache_sram Wang Wenhu
2020-04-16  7:29         ` [PATCH v3,3/4] powerpc: sysdev: fix compile warning " Wang Wenhu
2020-04-16  7:29         ` [PATCH v3,4/4] drivers: uio: new driver " Wang Wenhu
2020-04-16  7:41       ` [PATCH v3,0/4] drivers: uio: new driver uio_fsl_85xx_cache_sram Wang Wenhu
2020-04-16  7:41         ` [PATCH v3,1/4] powerpc: sysdev: fix compile error for fsl_85xx_l2ctlr Wang Wenhu
2020-04-16  7:41         ` [PATCH v3,2/4] powerpc: sysdev: fix compile error for fsl_85xx_cache_sram Wang Wenhu
2020-04-16  7:41         ` [PATCH v3,3/4] powerpc: sysdev: fix compile warning " Wang Wenhu
2020-04-16  7:41         ` [PATCH v3,4/4] drivers: uio: new driver " Wang Wenhu
2020-04-16  7:49       ` [PATCH v3,0/4] drivers: uio: new driver uio_fsl_85xx_cache_sram Wang Wenhu
2020-04-16  7:49         ` [PATCH v3,1/4] powerpc: sysdev: fix compile error for fsl_85xx_l2ctlr Wang Wenhu
2020-04-16  7:49         ` [PATCH v3,2/4] powerpc: sysdev: fix compile error for fsl_85xx_cache_sram Wang Wenhu
2020-04-16  7:49         ` [PATCH v3,3/4] powerpc: sysdev: fix compile warning " Wang Wenhu
2020-04-16  7:49         ` [PATCH v3,4/4] drivers: uio: new driver " Wang Wenhu
2020-04-16  9:29         ` Re:[PATCH v3,0/4] drivers: uio: new driver uio_fsl_85xx_cache_sram 王文虎
2020-04-16 10:36           ` [PATCH " Christophe Leroy
2020-04-16 11:14             ` 王文虎

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=ef9f59f98f6bcf81891de87fd9cd0b5973bbd468.camel@buserror.net \
    --to=oss@buserror.net \
    --cc=christophe.leroy@c-s.fr \
    --cc=gregkh@linuxfoundation.org \
    --cc=kernel@vivo.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linuxppc-dev@lists.ozlabs.org \
    --cc=mpe@ellerman.id.au \
    --cc=wenhu.wang@vivo.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).