From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1F840C63705 for ; Thu, 8 Dec 2022 09:33:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229521AbiLHJd0 convert rfc822-to-8bit (ORCPT ); Thu, 8 Dec 2022 04:33:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33456 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229770AbiLHJdX (ORCPT ); Thu, 8 Dec 2022 04:33:23 -0500 Received: from bg4.exmail.qq.com (bg4.exmail.qq.com [43.154.221.58]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6EA1759FDE; Thu, 8 Dec 2022 01:33:16 -0800 (PST) X-QQ-mid: bizesmtp80t1670491970tmadzmjb Received: from [192.168.3.2] ( [111.196.135.79]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 08 Dec 2022 17:32:48 +0800 (CST) X-QQ-SSF: 01200000000000B0B000000A0000000 X-QQ-FEAT: zX46NWeZQGEPkwa09vvX1e9B/NktWgMjOM4wpw+/LIo80yqhwau4SCVAglcsW 9vsBVIHhCU9XlW9C/ACb/6mMlDXDUOlYQ36EXhCDA5boUGbllxcBEHLmNSXc2s3hXMCbtf0 RTJXfEdQWQnUzHr/ri13d1YrvY8+oCMmAwqK7DoYT8tcO0NqZQXJnA4B70etX7aItOsQjwY M1wXkiYNJ0lqlMmHeQU388p4klUI6z3WLOtdfra37UihjKn0gZIuNhijHRPBp4wCt/SnebH A652eiO6RR81OjgRhHYJSzeQ4MVQ9ACl5U2OHqBJTiMJLIc6q80/PBAtBa059m2JzfICZ2j jwbaEhlvS3fBLJJ0QY= X-QQ-GoodBg: 0 From: "Bin Meng" To: "Jiri Slaby" , linux-kernel , linux-riscv , linux-serial Subject: Re: [PATCH v2 1/3] serial: earlycon-arm-semihost: Move smh_putc() variants in respective arch's semihost.h Cc: "catalin.marinas" , gregkh , linux , will , linux-arm-kernel Date: Thu, 08 Dec 2022 09:32:48 +0000 Message-Id: In-Reply-To: <0443d5e9-b2ce-7e6b-c69b-708d67a5bf97@kernel.org> References: <20221207135352.592556-1-bmeng@tinylab.org> <0443d5e9-b2ce-7e6b-c69b-708d67a5bf97@kernel.org> Reply-To: "Bin Meng" User-Agent: eM_Client/9.2.1222.0 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8BIT X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvr:qybglogicsvr3 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2022/12/8 14:08:33, "Jiri Slaby" wrote: >On 07. 12. 22, 14:53, Bin Meng wrote: >>Move smh_putc() variants in respective arch/*/include/asm/semihost.h, >>in preparation to add RISC-V support. >> >>Signed-off-by: Bin Meng >... >>--- /dev/null >>+++ b/arch/arm/include/asm/semihost.h >>@@ -0,0 +1,23 @@ >>+/* SPDX-License-Identifier: GPL-2.0 */ >>+/* >>+ * Copyright (C) 2012 ARM Ltd. >>+ * Author: Marc Zyngier >>+ * >>+ * Adapted for ARM and earlycon: >>+ * Copyright (C) 2014 Linaro Ltd. >>+ * Author: Rob Herring >>+ */ > >Much better. There are three minor issues: >1) protection against multiple #include-s is missing here. Oops, will add in v3. > > >>+#ifdef CONFIG_THUMB2_KERNEL >>+#define SEMIHOST_SWI "0xab" >>+#else >>+#define SEMIHOST_SWI "0x123456" >>+#endif >>+ >>+static inline void smh_putc(struct uart_port *port, unsigned char c) > >2) port is unused in all implementations. So it should be dropped. >3) can you make "c" an explicit u8? The smh_putc function signature is defined by the uart_console_write helper. I don't think we can change it. > >>+{ >>+ asm volatile("mov r1, %0\n" >>+ "mov r0, #3\n" >>+ "svc " SEMIHOST_SWI "\n" >>+ : : "r" (&c) : "r0", "r1", "memory"); >>+} Regards, Bin