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Subject: Re: [PATCH v1 0/4] EMC fixes for Tegra30+
To:     Dmitry Osipenko <digetx@gmail.com>,
        Thierry Reding <thierry.reding@gmail.com>,
        Peter De Schrijver <pdeschrijver@nvidia.com>
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References: <20180830185404.7224-1-digetx@gmail.com>
 <d1f577d8-a944-35b6-89b3-ce4eafdd4808@gmail.com>
From:   Jon Hunter <jonathanh@nvidia.com>
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Date:   Mon, 19 Nov 2018 15:42:40 +0000
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On 18/11/2018 22:06, Dmitry Osipenko wrote:
> On 30.08.2018 21:54, Dmitry Osipenko wrote:
>> Hello,
>>
>> This patch series fixes couple bugs in the memory self-refresh code.
>> The EMC / MC state is properly restored after patches being applied,
>> please review.
>>
>> Dmitry Osipenko (4):
>>   ARM: tegra: Fix missed EMC registers latching on resume from LP1 on
>>     Tegra30+
>>   ARM: tegra: Fix DRAM refresh-interval clobbering on resume from LP1 on
>>     Tegra30
>>   ARM: tegra: Restore memory arbitration on resume from LP1 on Tegra30+
>>   ARM: tegra: Clear EMC interrupts on resume from LP1 on Tegra30+
>>
>>  arch/arm/mach-tegra/iomap.h         |  9 ++++++++
>>  arch/arm/mach-tegra/sleep-tegra30.S | 32 +++++++++++++++++++++++++++--
>>  2 files changed, 39 insertions(+), 2 deletions(-)
>>
> 
> Hello Jon,
> 
> Could you please test these patches using your testing setup? Will be awesome if you could give t-b/r-b to the series, then there should be a better chance that Thierry could apply it eventually ;)

Yes I will give them a test and let you know.

Cheers
Jon

-- 
nvpublic