From: Zong Li <zong@andestech.com>
To: <palmer@sifive.com>, <albert@sifive.com>,
<linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
<zong@andestech.com>, <zongbox@gmail.com>
Cc: <greentime@andestech.com>
Subject: [PATCH v2 09/11] RISC-V: Support SUB32 relocation type in kernel module
Date: Thu, 15 Mar 2018 16:50:49 +0800 [thread overview]
Message-ID: <f577fe0f07e5e417c11877c714ae4c6e93249e9e.1521103173.git.zong@andestech.com> (raw)
In-Reply-To: <cover.1521103167.git.zong@andestech.com>
Signed-off-by: Zong Li <zong@andestech.com>
---
arch/riscv/kernel/module.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c
index 73ea36c73d3b..5dddba301d0a 100644
--- a/arch/riscv/kernel/module.c
+++ b/arch/riscv/kernel/module.c
@@ -256,6 +256,13 @@ static int apply_r_riscv_add32_rela(struct module *me, u32 *location,
return 0;
}
+static int apply_r_riscv_sub32_rela(struct module *me, u32 *location,
+ Elf_Addr v)
+{
+ *(u32 *)location -= (*(u32 *)v);
+ return 0;
+}
+
static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
Elf_Addr v) = {
[R_RISCV_64] = apply_r_riscv_64_rela,
@@ -275,6 +282,7 @@ static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
[R_RISCV_RELAX] = apply_r_riscv_relax_rela,
[R_RISCV_ALIGN] = apply_r_riscv_align_rela,
[R_RISCV_ADD32] = apply_r_riscv_add32_rela,
+ [R_RISCV_SUB32] = apply_r_riscv_sub32_rela,
};
int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
--
2.16.1
next prev parent reply other threads:[~2018-03-15 8:52 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-15 8:50 [PATCH v2 00/11] RISC-V: Resolve the issue of loadable module on 64-bit Zong Li
2018-03-15 8:50 ` [PATCH v2 01/11] RISC-V: Add sections of PLT and GOT for kernel module Zong Li
2018-03-15 8:50 ` [PATCH v2 02/11] RISC-V: Add section of GOT.PLT " Zong Li
2018-03-15 8:50 ` [PATCH v2 03/11] RISC-V: Support GOT_HI20/CALL_PLT relocation type in " Zong Li
2018-03-15 8:50 ` [PATCH v2 04/11] RISC-V: Support CALL " Zong Li
2018-03-15 8:50 ` [PATCH v2 05/11] RISC-V: Support HI20/LO12_I/LO12_S " Zong Li
2018-03-15 8:50 ` [PATCH v2 06/11] RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq Zong Li
2018-03-15 8:50 ` [PATCH v2 07/11] RISC-V: Support ALIGN relocation type in kernel module Zong Li
2018-03-15 8:50 ` [PATCH v2 08/11] RISC-V: Support ADD32 " Zong Li
2018-03-15 8:50 ` Zong Li [this message]
2018-03-15 8:50 ` [PATCH v2 10/11] RISC-V: Enable module support in defconfig Zong Li
2018-03-15 8:50 ` [PATCH v2 11/11] RISC-V: Add definition of relocation types Zong Li
2018-03-16 1:18 ` [PATCH v2 00/11] RISC-V: Resolve the issue of loadable module on 64-bit Zong Li
2018-03-20 17:11 ` Palmer Dabbelt
2018-03-21 2:53 ` Zong Li
2018-03-24 12:59 ` Shea Levy
2018-03-24 15:21 ` Zong Li
2018-03-24 15:59 ` Shea Levy
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