From: Jon Hunter <jonathanh@nvidia.com>
To: Sameer Pujar <spujar@nvidia.com>, <perex@perex.cz>,
<tiwai@suse.com>, <robh+dt@kernel.org>
Cc: <broonie@kernel.org>, <lgirdwood@gmail.com>,
<thierry.reding@gmail.com>, <digetx@gmail.com>,
<alsa-devel@alsa-project.org>, <devicetree@vger.kernel.org>,
<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<sharadg@nvidia.com>, <mkumard@nvidia.com>,
<viswanathl@nvidia.com>, <rlokhande@nvidia.com>,
<dramesh@nvidia.com>, <atalambedu@nvidia.com>
Subject: Re: [PATCH v3 02/10] ASoC: tegra: add support for CIF programming
Date: Thu, 20 Feb 2020 14:30:55 +0000 [thread overview]
Message-ID: <f930e81b-3635-3b4d-8613-6e8b43e2efaf@nvidia.com> (raw)
In-Reply-To: <1582180492-25297-3-git-send-email-spujar@nvidia.com>
On 20/02/2020 06:34, Sameer Pujar wrote:
> Audio Client Interface (CIF) is a proprietary interface employed to route
> audio samples through Audio Hub (AHUB) components by inter connecting the
> various modules.
>
> This patch exports an inline function tegra_set_cif() which can be used,
> for now, to program CIF on Tegra210 and later Tegra generations. Later it
> can be extended to include helpers for legacy chips as well.
>
> Signed-off-by: Sameer Pujar <spujar@nvidia.com>
> ---
> sound/soc/tegra/tegra_cif.h | 63 +++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 63 insertions(+)
> create mode 100644 sound/soc/tegra/tegra_cif.h
>
> diff --git a/sound/soc/tegra/tegra_cif.h b/sound/soc/tegra/tegra_cif.h
> new file mode 100644
> index 0000000..ecc0850
> --- /dev/null
> +++ b/sound/soc/tegra/tegra_cif.h
> @@ -0,0 +1,63 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * tegra_cif.h - TEGRA Audio CIF Programming
> + *
> + * Copyright (c) 2020 NVIDIA CORPORATION. All rights reserved.
> + *
> + */
> +
> +#ifndef __TEGRA_CIF_H__
> +#define __TEGRA_CIF_H__
> +
> +#define TEGRA_ACIF_CTRL_FIFO_TH_SHIFT 24
> +#define TEGRA_ACIF_CTRL_AUDIO_CH_SHIFT 20
> +#define TEGRA_ACIF_CTRL_CLIENT_CH_SHIFT 16
> +#define TEGRA_ACIF_CTRL_AUDIO_BITS_SHIFT 12
> +#define TEGRA_ACIF_CTRL_CLIENT_BITS_SHIFT 8
> +#define TEGRA_ACIF_CTRL_EXPAND_SHIFT 6
> +#define TEGRA_ACIF_CTRL_STEREO_CONV_SHIFT 4
> +#define TEGRA_ACIF_CTRL_REPLICATE_SHIFT 3
> +#define TEGRA_ACIF_CTRL_TRUNCATE_SHIFT 1
> +#define TEGRA_ACIF_CTRL_MONO_CONV_SHIFT 0
> +
> +/* AUDIO/CLIENT_BITS values */
> +#define TEGRA_ACIF_BITS_8 1
> +#define TEGRA_ACIF_BITS_16 3
> +#define TEGRA_ACIF_BITS_24 5
> +#define TEGRA_ACIF_BITS_32 7
> +
> +#define TEGRA_ACIF_UPDATE_MASK 0x3ffffffb
> +
> +struct tegra_cif_conf {
> + unsigned int threshold;
> + unsigned int audio_ch;
> + unsigned int client_ch;
> + unsigned int audio_bits;
> + unsigned int client_bits;
> + unsigned int expand;
> + unsigned int stereo_conv;
> + unsigned int replicate;
> + unsigned int truncate;
> + unsigned int mono_conv;
> +};
> +
> +static inline void tegra_set_cif(struct regmap *regmap, unsigned int reg,
> + struct tegra_cif_conf *conf)
> +{
> + unsigned int value;
> +
> + value = (conf->threshold << TEGRA_ACIF_CTRL_FIFO_TH_SHIFT) |
> + ((conf->audio_ch - 1) << TEGRA_ACIF_CTRL_AUDIO_CH_SHIFT) |
> + ((conf->client_ch - 1) << TEGRA_ACIF_CTRL_CLIENT_CH_SHIFT) |
> + (conf->audio_bits << TEGRA_ACIF_CTRL_AUDIO_BITS_SHIFT) |
> + (conf->client_bits << TEGRA_ACIF_CTRL_CLIENT_BITS_SHIFT) |
> + (conf->expand << TEGRA_ACIF_CTRL_EXPAND_SHIFT) |
> + (conf->stereo_conv << TEGRA_ACIF_CTRL_STEREO_CONV_SHIFT) |
> + (conf->replicate << TEGRA_ACIF_CTRL_REPLICATE_SHIFT) |
> + (conf->truncate << TEGRA_ACIF_CTRL_TRUNCATE_SHIFT) |
> + (conf->mono_conv << TEGRA_ACIF_CTRL_MONO_CONV_SHIFT);
> +
> + regmap_update_bits(regmap, reg, TEGRA_ACIF_UPDATE_MASK, value);
> +}
> +
> +#endif
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Cheers!
Jon
--
nvpublic
next prev parent reply other threads:[~2020-02-20 14:31 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-20 6:34 [PATCH v3 00/10] add ASoC components for AHUB Sameer Pujar
2020-02-20 6:34 ` [PATCH v3 01/10] dt-bindings: sound: tegra: add DT binding " Sameer Pujar
2020-02-21 12:39 ` Mark Brown
2020-02-26 16:02 ` Rob Herring
2020-02-20 6:34 ` [PATCH v3 02/10] ASoC: tegra: add support for CIF programming Sameer Pujar
2020-02-20 14:30 ` Jon Hunter [this message]
2020-02-21 5:27 ` Dmitry Osipenko
2020-02-20 6:34 ` [PATCH v3 03/10] ASoC: tegra: add Tegra210 based DMIC driver Sameer Pujar
2020-02-20 14:36 ` Jon Hunter
2020-02-21 5:53 ` Dmitry Osipenko
2020-02-21 13:00 ` Mark Brown
2020-02-21 14:31 ` Jon Hunter
2020-02-21 16:55 ` Mark Brown
2020-02-24 11:28 ` Jon Hunter
2020-02-24 11:44 ` Mark Brown
2020-02-24 12:29 ` Sameer Pujar
2020-02-24 13:18 ` Mark Brown
2020-02-28 7:30 ` Viswanath L
2020-02-20 6:34 ` [PATCH v3 04/10] ASoC: tegra: add Tegra210 based I2S driver Sameer Pujar
2020-02-20 14:45 ` Jon Hunter
2020-02-21 13:21 ` Mark Brown
2020-02-20 6:34 ` [PATCH v3 05/10] ASoC: tegra: add Tegra210 based AHUB driver Sameer Pujar
2020-02-20 6:51 ` Randy Dunlap
2020-02-20 15:08 ` Jon Hunter
2020-02-21 13:38 ` Mark Brown
2020-02-20 6:34 ` [PATCH v3 06/10] ASoC: tegra: add Tegra186 based DSPK driver Sameer Pujar
2020-02-20 6:53 ` Randy Dunlap
2020-02-20 15:10 ` Jon Hunter
2020-02-20 6:34 ` [PATCH v3 07/10] ASoC: tegra: add Tegra210 based ADMAIF driver Sameer Pujar
2020-02-20 6:55 ` Randy Dunlap
2020-02-20 15:16 ` Jon Hunter
2020-02-21 6:08 ` Dmitry Osipenko
2020-02-20 6:34 ` [PATCH v3 08/10] arm64: tegra: add AHUB components for few Tegra chips Sameer Pujar
2020-02-20 14:49 ` Jon Hunter
2020-02-20 6:34 ` [PATCH v3 09/10] arm64: tegra: enable AHUB modules " Sameer Pujar
2020-02-20 14:52 ` Jon Hunter
2020-02-20 6:34 ` [PATCH v3 10/10] arm64: defconfig: enable AHUB components for Tegra210 and later Sameer Pujar
2020-02-20 14:52 ` Jon Hunter
2020-02-21 5:44 ` Dmitry Osipenko
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