From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.4 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27BC7C4320E for ; Thu, 29 Jul 2021 08:09:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 095CF61050 for ; Thu, 29 Jul 2021 08:09:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235112AbhG2IJM (ORCPT ); Thu, 29 Jul 2021 04:09:12 -0400 Received: from mail.netline.ch ([148.251.143.180]:56476 "EHLO netline-mail3.netline.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235054AbhG2IJK (ORCPT ); Thu, 29 Jul 2021 04:09:10 -0400 Received: from localhost (localhost [127.0.0.1]) by netline-mail3.netline.ch (Postfix) with ESMTP id 9624E20201B; Thu, 29 Jul 2021 10:09:05 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at netline-mail3.netline.ch Received: from netline-mail3.netline.ch ([127.0.0.1]) by localhost (netline-mail3.netline.ch [127.0.0.1]) (amavisd-new, port 10024) with LMTP id qMf5KNcZpsS5; Thu, 29 Jul 2021 10:09:05 +0200 (CEST) Received: from thor (24.99.2.85.dynamic.wline.res.cust.swisscom.ch [85.2.99.24]) by netline-mail3.netline.ch (Postfix) with ESMTPA id 525BC20201A; Thu, 29 Jul 2021 10:09:04 +0200 (CEST) Received: from [::1] by thor with esmtp (Exim 4.94.2) (envelope-from ) id 1m916A-00140j-Bn; Thu, 29 Jul 2021 10:08:58 +0200 To: =?UTF-8?Q?Christian_K=c3=b6nig?= , Pekka Paalanen Cc: Rob Clark , Matthew Brost , Jack Zhang , =?UTF-8?Q?Christian_K=c3=b6nig?= , open list , dri-devel , "moderated list:DMA BUFFER SHARING FRAMEWORK" , Luben Tuikov , Roy Sun , Gustavo Padovan , Alex Deucher , Tian Tao , Lee Jones , "open list:DMA BUFFER SHARING FRAMEWORK" References: <20210726233854.2453899-1-robdclark@gmail.com> <28ca4167-4a65-0ccc-36be-5fb017f6f49d@daenzer.net> <99984703-c3ca-6aae-5888-5997d7046112@daenzer.net> <04d44873-d8e6-6ae7-f0f9-17bcb484d697@amd.com> <9d5f4415-d470-3bc1-7d52-61ba739706ae@daenzer.net> <20210728165700.38c39cf8@eldfell> <74e310fa-e544-889f-2389-5abe06f80eb8@amd.com> From: =?UTF-8?Q?Michel_D=c3=a4nzer?= Subject: Re: [RFC 0/4] dma-fence: Deadline awareness Message-ID: Date: Thu, 29 Jul 2021 10:08:58 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.12.0 MIME-Version: 1.0 In-Reply-To: <74e310fa-e544-889f-2389-5abe06f80eb8@amd.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-CA Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2021-07-28 4:30 p.m., Christian König wrote: > Am 28.07.21 um 15:57 schrieb Pekka Paalanen: >> On Wed, 28 Jul 2021 15:31:41 +0200 >> Christian König wrote: >> >>> Am 28.07.21 um 15:24 schrieb Michel Dänzer: >>>> On 2021-07-28 3:13 p.m., Christian König wrote: >>>>> Am 28.07.21 um 15:08 schrieb Michel Dänzer: >>>>>> On 2021-07-28 1:36 p.m., Christian König wrote: >>>>>>> At least AMD hardware is already capable of flipping frames on GPU events like finishing rendering (or uploading etc). >>>>>>> >>>>>>> By waiting in userspace on the CPU before send the frame to the hardware you are completely killing of such features. >>>>>>> >>>>>>> For composing use cases that makes sense, but certainly not for full screen applications as far as I can see. >>>>>> Even for fullscreen, the current KMS API only allows queuing a single page flip per CRTC, with no way to cancel or otherwise modify it. Therefore, a Wayland compositor has to set a deadline for the next refresh cycle, and when the deadline passes, it has to select the best buffer available for the fullscreen surface. To make sure the flip will not miss the next refresh cycle, the compositor has to pick an idle buffer. If it picks a non-idle buffer, and the pending rendering does not finish in time for vertical blank, the flip will be delayed by at least one refresh cycle, which results in visible stuttering. >>>>>> >>>>>> (Until the deadline passes, the Wayland compositor can't even know if a previously fullscreen surface will still be fullscreen for the next refresh cycle) >>>>> Well then let's extend the KMS API instead of hacking together workarounds in userspace. >>>> That's indeed a possible solution for the fullscreen / direct scanout case. >>>> >>>> Not for the general compositing case though, since a compositor does not want to composite multiple output frames per display refresh cycle, so it has to make sure the one frame hits the target. >>> Yeah, that's true as well. >>> >>> At least as long as nobody invents a mechanism to do this decision on >>> the GPU instead. >> That would mean putting the whole window manager into the GPU. > > Not really. You only need to decide if you want to use the new backing store or the old one based on if the new surface is ready or not. While something like that might be a possible optimization for (probably common) cases where the new buffer does not come with other state changes which affect the output frame beyond the buffer contents, there will always be cases (at least until a Wayland compositor can fully run on the GPU, as Pekka noted somewhat jokingly :) where this needs to be handled on the CPU. I'm currently focusing on that general case. Optimizations for special cases may follow later. -- Earthling Michel Dänzer | https://redhat.com Libre software enthusiast | Mesa and X developer