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[98.179.76.75]) by smtp.gmail.com with ESMTPSA id c2-20020ae9ed02000000b007339c5114a9sm1295618qkg.103.2023.04.21.05.50.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 05:50:15 -0700 (PDT) Date: Fri, 21 Apr 2023 05:50:13 -0700 From: Jerry Snitselaar To: Krishna Yarlagadda Cc: robh+dt@kernel.org, broonie@kernel.org, peterhuewe@gmx.de, jgg@ziepe.ca, jarkko@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-spi@vger.kernel.org, linux-tegra@vger.kernel.org, linux-integrity@vger.kernel.org, linux-kernel@vger.kernel.org, thierry.reding@gmail.com, jonathanh@nvidia.com, skomatineni@nvidia.com, ldewangan@nvidia.com Subject: Re: [Patch V10 0/3] Tegra TPM driver with HW flow control Message-ID: References: <20230421091309.2672-1-kyarlagadda@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230421091309.2672-1-kyarlagadda@nvidia.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Apr 21, 2023 at 02:43:06PM +0530, Krishna Yarlagadda wrote: > TPM devices may insert wait state on last clock cycle of ADDR phase. > For SPI controllers that support full-duplex transfers, this can be > detected using software by reading the MISO line. For SPI controllers > that only support half-duplex transfers, such as the Tegra QSPI, it is > not possible to detect the wait signal from software. The QSPI > controller in Tegra234 and Tegra241 implement hardware detection of the > wait signal which can be enabled in the controller for TPM devices. > > Add HW flow control in TIS driver and a flag in SPI data to indicate > wait detection is required in HW. SPI controller driver determines if > this is supported. Add HW detection in Tegra QSPI controller. > > Updates in this patch set > - Tegra QSPI identifies itself as half duplex. > - TPM TIS SPI driver skips flow control for half duplex and send > transfers in single message for controller to handle it. > - TPM device identifies as TPM device for controller to detect and > enable HW TPM wait poll feature. > > Verified with a TPM device on Tegra241 ref board using TPM2 tools. > > V10 > - use spi_sync in place of spi_sync_locked > V9 > - renamed tpm spi transfer functions > V8: > - fix compile warning. > V7: > - updated patch description. > - TPM flag set in probe. > - minor comments. > V6: > - Fix typo in chip name Tegra234. > - Debug logs change skipped to be sent later. > - Consistent usage of soc flag. > V5: > - No SPI bus locking. > V4: > - Split api change to different patch. > - Describe TPM HW flow control. > V3: > - Use SPI device mode flag and SPI controller flags. > - Drop usage of device tree flags. > - Generic TPM half duplex controller handling. > - HW & SW flow control for TPM. Drop additional driver. > V2: > - Fix dt schema errors. > > Krishna Yarlagadda (3): > spi: Add TPM HW flow flag > tpm_tis-spi: Add hardware wait polling > spi: tegra210-quad: Enable TPM wait polling > > drivers/char/tpm/tpm_tis_spi_main.c | 91 ++++++++++++++++++++++++++++- > drivers/spi/spi-tegra210-quad.c | 14 +++++ > include/linux/spi/spi.h | 16 ++++- > 3 files changed, 116 insertions(+), 5 deletions(-) > > -- > 2.17.1 > Reviewed-by: Jerry Snitselaar