From: Palmer Dabbelt <palmer@dabbelt.com>
To: greentime.hu@sifive.com
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
aou@eecs.berkeley.edu
Subject: Re: [PATCH v9 01/17] riscv: Separate patch for cflags and aflags
Date: Tue, 14 Dec 2021 08:29:17 -0800 (PST) [thread overview]
Message-ID: <mhng-24dd1554-4004-4132-abde-6142a4aa19d3@palmer-ri-x1c9> (raw)
In-Reply-To: <f76b0312113bf960e114724cb578a060b3f101ab.1636362169.git.greentime.hu@sifive.com>
On Tue, 09 Nov 2021 01:48:13 PST (-0800), greentime.hu@sifive.com wrote:
> From: Guo Ren <ren_guo@c-sky.com>
>
> Use "subst fd" in Makefile is a hack way and it's not convenient
> to add new ISA feature. Just separate them into riscv-march-cflags
> and riscv-march-aflags.
>
> Signed-off-by: Guo Ren <ren_guo@c-sky.com>
> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
> ---
> arch/riscv/Makefile | 18 ++++++++++++------
> 1 file changed, 12 insertions(+), 6 deletions(-)
>
> diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
> index 0eb4568fbd29..37de70df4fae 100644
> --- a/arch/riscv/Makefile
> +++ b/arch/riscv/Makefile
> @@ -48,12 +48,18 @@ endif
> endif
>
> # ISA string setting
> -riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima
> -riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima
> -riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
> -riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c
> -KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))
> -KBUILD_AFLAGS += -march=$(riscv-march-y)
> +riscv-march-cflags-$(CONFIG_ARCH_RV32I) := rv32ima
> +riscv-march-cflags-$(CONFIG_ARCH_RV64I) := rv64ima
> +riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
> +riscv-march-cflags-$(CONFIG_RISCV_ISA_C) := $(riscv-march-cflags-y)c
> +
> +riscv-march-aflags-$(CONFIG_ARCH_RV32I) := rv32ima
> +riscv-march-aflags-$(CONFIG_ARCH_RV64I) := rv64ima
> +riscv-march-aflags-$(CONFIG_FPU) := $(riscv-march-aflags-y)fd
> +riscv-march-aflags-$(CONFIG_RISCV_ISA_C) := $(riscv-march-aflags-y)c
> +
> +KBUILD_CFLAGS += -march=$(riscv-march-cflags-y)
> +KBUILD_AFLAGS += -march=$(riscv-march-aflags-y)
>
> KBUILD_CFLAGS += -mno-save-restore
> KBUILD_CFLAGS += -DCONFIG_PAGE_OFFSET=$(CONFIG_PAGE_OFFSET)
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
next prev parent reply other threads:[~2021-12-14 16:29 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-09 9:48 [PATCH v9 00/17] riscv: Add vector ISA support Greentime Hu
2021-11-09 9:48 ` [PATCH v9 01/17] riscv: Separate patch for cflags and aflags Greentime Hu
2021-12-14 16:29 ` Palmer Dabbelt [this message]
2021-11-09 9:48 ` [PATCH v9 02/17] riscv: Rename __switch_to_aux -> fpu Greentime Hu
2021-12-14 16:29 ` Palmer Dabbelt
2021-11-09 9:48 ` [PATCH v9 03/17] riscv: Extending cpufeature.c to detect V-extension Greentime Hu
2021-12-14 16:29 ` Palmer Dabbelt
2021-11-09 9:48 ` [PATCH v9 04/17] riscv: Add new csr defines related to vector extension Greentime Hu
2021-12-14 16:29 ` Palmer Dabbelt
2021-11-09 9:48 ` [PATCH v9 05/17] riscv: Add vector feature to compile Greentime Hu
2021-11-12 0:54 ` kernel test robot
2021-12-14 16:29 ` Palmer Dabbelt
2021-11-09 9:48 ` [PATCH v9 06/17] riscv: Add has_vector/riscv_vsize to save vector features Greentime Hu
2021-12-14 16:29 ` Palmer Dabbelt
2021-11-09 9:48 ` [PATCH v9 07/17] riscv: Reset vector register Greentime Hu
2021-12-14 16:29 ` Palmer Dabbelt
2022-01-04 6:02 ` Greentime Hu
2021-11-09 9:48 ` [PATCH v9 08/17] riscv: Add vector struct and assembler definitions Greentime Hu
2021-12-14 16:29 ` Palmer Dabbelt
2022-01-07 13:28 ` Greentime Hu
2022-01-07 13:53 ` Jessica Clarke
2021-11-09 9:48 ` [PATCH v9 09/17] riscv: Add task switch support for vector Greentime Hu
2021-11-11 13:49 ` kernel test robot
2021-11-11 19:16 ` kernel test robot
2021-12-15 18:38 ` Palmer Dabbelt
2021-11-09 9:48 ` [PATCH v9 10/17] riscv: Add ptrace vector support Greentime Hu
2021-11-09 9:48 ` [PATCH v9 11/17] riscv: Add sigcontext save/restore for vector Greentime Hu
2021-11-09 9:48 ` [PATCH v9 12/17] riscv: signal: Report signal frame size to userspace via auxv Greentime Hu
2021-11-09 9:48 ` [PATCH v9 13/17] riscv: Add support for kernel mode vector Greentime Hu
2021-11-09 9:48 ` [PATCH v9 14/17] riscv: Use CSR_STATUS to replace sstatus in vector.S Greentime Hu
2021-11-09 9:48 ` [PATCH v9 15/17] riscv: Add vector extension XOR implementation Greentime Hu
2021-11-09 9:48 ` [PATCH v9 16/17] riscv: Fix an illegal instruction exception when accessing vlenb without enable vector first Greentime Hu
2021-11-10 10:38 ` Ben Dooks
2021-11-16 13:14 ` Greentime Hu
2021-11-09 9:48 ` [PATCH v9 17/17] riscv: Fix a kernel panic issue if $s2 is set to a specific value before entering Linux Greentime Hu
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