From: Palmer Dabbelt <palmer@sifive.com>
To: anup@brainfault.org
Cc: daniel.lezcano@linaro.org, tglx@linutronix.de,
aou@eecs.berkeley.edu, atish.patra@wdc.com,
Christoph Hellwig <hch@infradead.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
anup@brainfault.org
Subject: Re: [PATCH] clocksource: riscv_timer: Provide sched_clock
Date: Thu, 06 Dec 2018 12:32:23 -0800 (PST) [thread overview]
Message-ID: <mhng-41a72f59-6506-420f-a01e-b01c81ab6e33@palmer-si-x1c4> (raw)
In-Reply-To: <20181203123524.11778-1-anup@brainfault.org>
On Mon, 03 Dec 2018 04:35:24 PST (-0800), anup@brainfault.org wrote:
> Currently, we don't have a sched_clock registered for RISC-V systems.
> This means Linux time keeping will use jiffies (running at HZ) as the
> default sched_clock.
>
> To avoid this, we explicity provide sched_clock using RISC-V rdtime
> instruction (similar to riscv_timer clocksource).
>
> Signed-off-by: Anup Patel <anup@brainfault.org>
> ---
> drivers/clocksource/riscv_timer.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/clocksource/riscv_timer.c b/drivers/clocksource/riscv_timer.c
> index 084e97dc10ed..431892200a08 100644
> --- a/drivers/clocksource/riscv_timer.c
> +++ b/drivers/clocksource/riscv_timer.c
> @@ -8,6 +8,7 @@
> #include <linux/cpu.h>
> #include <linux/delay.h>
> #include <linux/irq.h>
> +#include <linux/sched_clock.h>
> #include <asm/smp.h>
> #include <asm/sbi.h>
>
> @@ -49,6 +50,11 @@ static unsigned long long riscv_clocksource_rdtime(struct clocksource *cs)
> return get_cycles64();
> }
>
> +static u64 riscv_sched_clock(void)
> +{
> + return get_cycles64();
> +}
> +
> static DEFINE_PER_CPU(struct clocksource, riscv_clocksource) = {
> .name = "riscv_clocksource",
> .rating = 300,
> @@ -97,6 +103,9 @@ static int __init riscv_timer_init_dt(struct device_node *n)
> cs = per_cpu_ptr(&riscv_clocksource, cpuid);
> clocksource_register_hz(cs, riscv_timebase);
>
> + sched_clock_register(riscv_sched_clock,
> + BITS_PER_LONG, riscv_timebase);
Shouldn't this just be 64, not BITS_PER_LONG? We have 64-bit counters on
RV32I.
> +
> error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING,
> "clockevents/riscv/timer:starting",
> riscv_timer_starting_cpu, riscv_timer_dying_cpu);
next prev parent reply other threads:[~2018-12-06 20:32 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-03 12:35 [PATCH] clocksource: riscv_timer: Provide sched_clock Anup Patel
2018-12-03 12:59 ` Daniel Lezcano
2018-12-03 14:50 ` Anup Patel
2018-12-03 14:53 ` Daniel Lezcano
2018-12-06 20:32 ` Palmer Dabbelt [this message]
2018-12-07 2:27 ` Anup Patel
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