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[76.210.143.223]) by smtp.gmail.com with ESMTPSA id 23sm19811865pfw.97.2021.10.05.08.04.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Oct 2021 08:04:05 -0700 (PDT) Date: Tue, 05 Oct 2021 08:04:05 -0700 (PDT) X-Google-Original-Date: Tue, 05 Oct 2021 08:04:03 PDT (-0700) Subject: Re: [PATCH v20 00/17] KVM RISC-V Support In-Reply-To: CC: Anup Patel , Paul Walmsley , aou@eecs.berkeley.edu, graf@amazon.com, Atish Patra , Alistair Francis , Damien Le Moal , anup@brainfault.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org From: Palmer Dabbelt To: pbonzini@redhat.com Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 05 Oct 2021 00:37:27 PDT (-0700), pbonzini@redhat.com wrote: > On 04/10/21 20:01, Palmer Dabbelt wrote: >> >> Just to make sure we're on the same page here, I've got >> >>    commit 6c341a285912ddb2894ef793a58ad4f8462f26f4 (HEAD -> for-next) >>    Merge: 08da1608a1ca 3f2401f47d29 >>    Author: Palmer Dabbelt >>    Date:   Mon Oct 4 10:12:44 2021 -0700 >>        Merge tag 'for-riscv' of >> https://git.kernel.org/pub/scm/virt/kvm/kvm.git into for-next >>        H extension definitions, shared by the KVM and RISC-V trees. >>        * tag 'for-riscv' of >> ssh://gitolite.kernel.org/pub/scm/virt/kvm/kvm: (301 commits) >>          RISC-V: Add hypervisor extension related CSR defines >>          KVM: selftests: Ensure all migrations are performed when test >> is affined >>          KVM: x86: Swap order of CPUID entry "index" vs. "significant >> flag" checks >>          ptp: Fix ptp_kvm_getcrosststamp issue for x86 ptp_kvm >>          x86/kvmclock: Move this_cpu_pvti into kvmclock.h >>          KVM: s390: Function documentation fixes >>          selftests: KVM: Don't clobber XMM register when read >>          KVM: VMX: Fix a TSX_CTRL_CPUID_CLEAR field mask issue >>          selftests: KVM: Explicitly use movq to read xmm registers >>          selftests: KVM: Call ucall_init when setting up in rseq_test >>          KVM: Remove tlbs_dirty >>          KVM: X86: Synchronize the shadow pagetable before link it >>          KVM: X86: Fix missed remote tlb flush in rmap_write_protect() >>          KVM: x86: nSVM: don't copy virt_ext from vmcb12 >>          KVM: x86: nSVM: test eax for 4K alignment for GP errata >> workaround >>          KVM: x86: selftests: test simultaneous uses of V_IRQ from L1 >> and L0 >>          KVM: x86: nSVM: restore int_vector in svm_clear_vintr >>          kvm: x86: Add AMD PMU MSRs to msrs_to_save_all[] >>          KVM: x86: nVMX: re-evaluate emulation_required on nested VM exit >>          KVM: x86: nVMX: don't fail nested VM entry on invalid guest >> state if !from_vmentry >>          ... >> >> into >> ssh://git@gitolite.kernel.org/pub/scm/linux/kernel/git/palmer/linux.git >> for-next >> (I know that's kind of a confusing name, but it's what I've been using >> as my short-term staging branch so I can do all my tests before saying >> "it's on for-next"). >> >> If that looks OK I can make it a touch more official by putting into the >> RISC-V tree. > > Yes. All of the patches in there, except the last, are already in > Linus's tree. Great, it's up.