From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754257AbbERPiM (ORCPT ); Mon, 18 May 2015 11:38:12 -0400 Received: from terminus.zytor.com ([198.137.202.10]:46057 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754224AbbERPiA (ORCPT ); Mon, 18 May 2015 11:38:00 -0400 Date: Mon, 18 May 2015 08:37:43 -0700 From: tip-bot for Stefan Agner Message-ID: Cc: hpa@zytor.com, mingo@kernel.org, stefan@agner.ch, tglx@linutronix.de, linux-kernel@vger.kernel.org Reply-To: tglx@linutronix.de, stefan@agner.ch, hpa@zytor.com, mingo@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <1431769465-26867-6-git-send-email-stefan@agner.ch> References: <1431769465-26867-6-git-send-email-stefan@agner.ch> To: linux-tip-commits@vger.kernel.org Subject: [tip:irq/core] irqchip: vf610-mscm: Support NVIC parent chip Git-Commit-ID: 81eb67f0ed8d3aa799f909c12c8f1addcf8a0b79 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: 81eb67f0ed8d3aa799f909c12c8f1addcf8a0b79 Gitweb: http://git.kernel.org/tip/81eb67f0ed8d3aa799f909c12c8f1addcf8a0b79 Author: Stefan Agner AuthorDate: Sat, 16 May 2015 11:44:17 +0200 Committer: Thomas Gleixner CommitDate: Mon, 18 May 2015 17:32:44 +0200 irqchip: vf610-mscm: Support NVIC parent chip Support the NVIC interrupt controller as node parent of the MSCM interrupt router. On the dual-core variants of Vybird (VF6xx), the NVIC interrupt controller is used by the Cortex-M4. To support running Linux on this core too, MSCM needs NVIC parent support too. [ tglx: Moved initialization of is_nvic before the domain registration ] Signed-off-by: Stefan Agner Cc: marc.zyngier@arm.com Cc: linux@arm.linux.org.uk Cc: u.kleine-koenig@pengutronix.de Cc: olof@lixom.net Cc: arnd@arndb.de Cc: daniel.lezcano@linaro.org Cc: mark.rutland@arm.com Cc: pawel.moll@arm.com Cc: robh+dt@kernel.org Cc: ijc+devicetree@hellion.org.uk Cc: galak@codeaurora.org Cc: mcoquelin.stm32@gmail.com Cc: linux-arm-kernel@lists.infradead.org Cc: shawn.guo@linaro.org Cc: kernel@pengutronix.de Cc: jason@lakedaemon.net Link: http://lkml.kernel.org/r/1431769465-26867-6-git-send-email-stefan@agner.ch Signed-off-by: Thomas Gleixner --- drivers/irqchip/irq-vf610-mscm-ir.c | 23 +++++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/drivers/irqchip/irq-vf610-mscm-ir.c b/drivers/irqchip/irq-vf610-mscm-ir.c index 9521057..9baad02 100644 --- a/drivers/irqchip/irq-vf610-mscm-ir.c +++ b/drivers/irqchip/irq-vf610-mscm-ir.c @@ -47,6 +47,7 @@ struct vf610_mscm_ir_chip_data { void __iomem *mscm_ir_base; u16 cpu_mask; u16 saved_irsprc[MSCM_IRSPRC_NUM]; + bool is_nvic; }; static struct vf610_mscm_ir_chip_data *mscm_ir_data; @@ -101,7 +102,7 @@ static void vf610_mscm_ir_enable(struct irq_data *data) writew_relaxed(chip_data->cpu_mask, chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq)); - irq_chip_unmask_parent(data); + irq_chip_enable_parent(data); } static void vf610_mscm_ir_disable(struct irq_data *data) @@ -111,7 +112,7 @@ static void vf610_mscm_ir_disable(struct irq_data *data) writew_relaxed(0x0, chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq)); - irq_chip_mask_parent(data); + irq_chip_disable_parent(data); } static struct irq_chip vf610_mscm_ir_irq_chip = { @@ -143,10 +144,17 @@ static int vf610_mscm_ir_domain_alloc(struct irq_domain *domain, unsigned int vi domain->host_data); gic_data.np = domain->parent->of_node; - gic_data.args_count = 3; - gic_data.args[0] = GIC_SPI; - gic_data.args[1] = irq_data->args[0]; - gic_data.args[2] = irq_data->args[1]; + + if (mscm_ir_data->is_nvic) { + gic_data.args_count = 1; + gic_data.args[0] = irq_data->args[0]; + } else { + gic_data.args_count = 3; + gic_data.args[0] = GIC_SPI; + gic_data.args[1] = irq_data->args[0]; + gic_data.args[2] = irq_data->args[1]; + } + return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &gic_data); } @@ -191,6 +199,9 @@ static int __init vf610_mscm_ir_of_init(struct device_node *node, regmap_read(mscm_cp_regmap, MSCM_CPxNUM, &cpuid); mscm_ir_data->cpu_mask = 0x1 << cpuid; + if (of_device_is_compatible(domain->parent->of_node, "arm,armv7m-nvic")) + mscm_ir_data->is_nvic = true; + domain = irq_domain_add_hierarchy(domain_parent, 0, MSCM_IRSPRC_NUM, node, &mscm_irq_domain_ops, mscm_ir_data);