linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: tip-bot for Colin King <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: tglx@linutronix.de, colin.king@canonical.com, mingo@kernel.org,
	peterz@infradead.org, kan.liang@intel.com,
	linux-kernel@vger.kernel.org, alexander.shishkin@linux.intel.com,
	ak@linux.intel.com, eranian@google.com, hpa@zytor.com
Subject: [tip:perf/urgent] perf/x86/intel: Use ULL constant to prevent undefined shift behaviour
Date: Wed, 11 Jan 2017 07:46:01 -0800	[thread overview]
Message-ID: <tip-ad5013d5699d30ded0cdbbc68b93b2aa28222c6e@git.kernel.org> (raw)
In-Reply-To: <20170111114310.17928-1-colin.king@canonical.com>

Commit-ID:  ad5013d5699d30ded0cdbbc68b93b2aa28222c6e
Gitweb:     http://git.kernel.org/tip/ad5013d5699d30ded0cdbbc68b93b2aa28222c6e
Author:     Colin King <colin.king@canonical.com>
AuthorDate: Wed, 11 Jan 2017 11:43:10 +0000
Committer:  Thomas Gleixner <tglx@linutronix.de>
CommitDate: Wed, 11 Jan 2017 16:43:30 +0100

perf/x86/intel: Use ULL constant to prevent undefined shift behaviour

When x86_pmu.num_counters is 32 the shift of the integer constant 1 is
exceeding 32bit and therefor undefined behaviour.

Fix this by shifting 1ULL instead of 1.

Reported-by: CoverityScan CID#1192105 ("Bad bit shift operation")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Kan Liang <kan.liang@intel.com>
Cc: Stephane Eranian <eranian@google.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Link: http://lkml.kernel.org/r/20170111114310.17928-1-colin.king@canonical.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/events/intel/core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 8613826..d611cab 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -3987,7 +3987,7 @@ __init int intel_pmu_init(void)
 		     x86_pmu.num_counters, INTEL_PMC_MAX_GENERIC);
 		x86_pmu.num_counters = INTEL_PMC_MAX_GENERIC;
 	}
-	x86_pmu.intel_ctrl = (1 << x86_pmu.num_counters) - 1;
+	x86_pmu.intel_ctrl = (1ULL << x86_pmu.num_counters) - 1;
 
 	if (x86_pmu.num_counters_fixed > INTEL_PMC_MAX_FIXED) {
 		WARN(1, KERN_ERR "hw perf events fixed %d > max(%d), clipping!",

      reply	other threads:[~2017-01-11 15:47 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-11 11:43 [PATCH] perf/x86/intel: fix integer overflow when shifting 32 places Colin King
2017-01-11 15:46 ` tip-bot for Colin King [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=tip-ad5013d5699d30ded0cdbbc68b93b2aa28222c6e@git.kernel.org \
    --to=tipbot@zytor.com \
    --cc=ak@linux.intel.com \
    --cc=alexander.shishkin@linux.intel.com \
    --cc=colin.king@canonical.com \
    --cc=eranian@google.com \
    --cc=hpa@zytor.com \
    --cc=kan.liang@intel.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-tip-commits@vger.kernel.org \
    --cc=mingo@kernel.org \
    --cc=peterz@infradead.org \
    --cc=tglx@linutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).