From: tip-bot for Yazen Ghannam <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: tony.luck@intel.com, peterz@infradead.org, bp@suse.de,
tglx@linutronix.de, Yazen.Ghannam@amd.com, hpa@zytor.com,
dvlasenk@redhat.com, mingo@kernel.org,
linux-kernel@vger.kernel.org, torvalds@linux-foundation.org,
brgerst@gmail.com, bp@alien8.de, luto@amacapital.net,
linux-edac@vger.kernel.org
Subject: [tip:ras/core] x86/mce: Detect local MCEs properly
Date: Tue, 3 May 2016 00:49:15 -0700 [thread overview]
Message-ID: <tip-fead35c68926682c90c995f22b48f1c8d78865c1@git.kernel.org> (raw)
In-Reply-To: <1462019637-16474-8-git-send-email-bp@alien8.de>
Commit-ID: fead35c68926682c90c995f22b48f1c8d78865c1
Gitweb: http://git.kernel.org/tip/fead35c68926682c90c995f22b48f1c8d78865c1
Author: Yazen Ghannam <Yazen.Ghannam@amd.com>
AuthorDate: Sat, 30 Apr 2016 14:33:57 +0200
Committer: Ingo Molnar <mingo@kernel.org>
CommitDate: Tue, 3 May 2016 08:24:17 +0200
x86/mce: Detect local MCEs properly
Check the MCG_STATUS_LMCES bit on Intel to verify that current MCE is
local. It is always local on AMD.
Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com>
[ Massaged it a bit. Reflowed comments. Shut up -Wmaybe-uninitialized. ]
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1462019637-16474-8-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
arch/x86/kernel/cpu/mcheck/mce.c | 33 ++++++++++++++++++++-------------
1 file changed, 20 insertions(+), 13 deletions(-)
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index c356f47..aeda446 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1038,11 +1038,12 @@ void do_machine_check(struct pt_regs *regs, long error_code)
int i;
int worst = 0;
int severity;
+
/*
* Establish sequential order between the CPUs entering the machine
* check handler.
*/
- int order;
+ int order = -1;
/*
* If no_way_out gets set, there is no safe way to recover from this
* MCE. If mca_cfg.tolerant is cranked up, we'll try anyway.
@@ -1056,7 +1057,12 @@ void do_machine_check(struct pt_regs *regs, long error_code)
DECLARE_BITMAP(toclear, MAX_NR_BANKS);
DECLARE_BITMAP(valid_banks, MAX_NR_BANKS);
char *msg = "Unknown";
- int lmce = 0;
+
+ /*
+ * MCEs are always local on AMD. Same is determined by MCG_STATUS_LMCES
+ * on Intel.
+ */
+ int lmce = 1;
/* If this CPU is offline, just bail out. */
if (cpu_is_offline(smp_processor_id())) {
@@ -1095,19 +1101,20 @@ void do_machine_check(struct pt_regs *regs, long error_code)
kill_it = 1;
/*
- * Check if this MCE is signaled to only this logical processor
+ * Check if this MCE is signaled to only this logical processor,
+ * on Intel only.
*/
- if (m.mcgstatus & MCG_STATUS_LMCES)
- lmce = 1;
- else {
- /*
- * Go through all the banks in exclusion of the other CPUs.
- * This way we don't report duplicated events on shared banks
- * because the first one to see it will clear it.
- * If this is a Local MCE, then no need to perform rendezvous.
- */
+ if (m.cpuvendor == X86_VENDOR_INTEL)
+ lmce = m.mcgstatus & MCG_STATUS_LMCES;
+
+ /*
+ * Go through all banks in exclusion of the other CPUs. This way we
+ * don't report duplicated events on shared banks because the first one
+ * to see it will clear it. If this is a Local MCE, then no need to
+ * perform rendezvous.
+ */
+ if (!lmce)
order = mce_start(&no_way_out);
- }
for (i = 0; i < cfg->banks; i++) {
__clear_bit(i, toclear);
prev parent reply other threads:[~2016-05-03 7:50 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-30 12:33 [PATCH 0/7] tip/ras/core: Second pile Borislav Petkov
2016-04-30 12:33 ` [PATCH 1/7] x86/mce: Log MCEs after a warm rest on AMD, fam 0x17 and later Borislav Petkov
2016-05-03 7:46 ` [tip:ras/core] x86/mce: Log MCEs after a warm rest on AMD, Fam17h " tip-bot for Aravind Gopalakrishnan
2016-04-30 12:33 ` [PATCH 2/7] x86/mce: Grade uncorrected errors for SMCA-enabled systems Borislav Petkov
2016-05-03 7:47 ` [tip:ras/core] " tip-bot for Aravind Gopalakrishnan
2016-04-30 12:33 ` [PATCH 3/7] x86/mce: Carve out writes to MCx_STATUS and MCx_CTL Borislav Petkov
2016-05-03 7:47 ` [tip:ras/core] " tip-bot for Aravind Gopalakrishnan
2016-04-30 12:33 ` [PATCH 4/7] x86/mce: Define vendor-specific MSR accessors Borislav Petkov
2016-05-03 7:48 ` [tip:ras/core] " tip-bot for Yazen Ghannam
2016-04-30 12:33 ` [PATCH 5/7] x86/mce: Detect and use SMCA-specific msr_ops Borislav Petkov
2016-05-03 7:48 ` [tip:ras/core] " tip-bot for Yazen Ghannam
2016-04-30 12:33 ` [PATCH 6/7] x86/mce: Look in genpool instead of mcelog for pending error records Borislav Petkov
2016-05-03 7:48 ` [tip:ras/core] " tip-bot for Tony Luck
2016-04-30 12:33 ` [PATCH 7/7] x86/mce: Detect local MCEs properly Borislav Petkov
2016-05-03 7:49 ` tip-bot for Yazen Ghannam [this message]
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