From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751416AbbLUA6O (ORCPT ); Sun, 20 Dec 2015 19:58:14 -0500 Received: from unicorn.mansr.com ([81.2.72.234]:52877 "EHLO unicorn.mansr.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750863AbbLUA6M convert rfc822-to-8bit (ORCPT ); Sun, 20 Dec 2015 19:58:12 -0500 From: =?iso-8859-1?Q?M=E5ns_Rullg=E5rd?= To: Andy Shevchenko Cc: Julian Margetson , Andy Shevchenko , Tejun Heo , linux-ide@vger.kernel.org, "linux-kernel\@vger.kernel.org" Subject: Re: [PATCH 1/3] ata: sata_dwc_460ex: use "dmas" DT property to find dma channel References: <1450221935-6034-1-git-send-email-mans@mansr.com> <56748D85.4060108@candw.ms> <567541EE.9010308@candw.ms> <56758F33.20804@candw.ms> <5675A84F.2070208@candw.ms> <5675BB2F.6060107@candw.ms> <5675C452.2080206@candw.ms> <5676E906.1060603@candw.ms> Date: Mon, 21 Dec 2015 00:58:11 +0000 In-Reply-To: (Andy Shevchenko's message of "Sun, 20 Dec 2015 22:17:31 +0200") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.5 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Andy Shevchenko writes: > On Sun, Dec 20, 2015 at 8:49 PM, Måns Rullgård wrote: >> Julian Margetson writes: >>> On 12/20/2015 1:11 PM, Måns Rullgård wrote: >>>> Julian Margetson writes: > >>> [ 48.769671] ata3.00: failed command: READ FPDMA QUEUED >> >> Well, that didn't help. I still think it's part of the problem, but >> something else must be wrong as well. The various Master Select fields >> look like a good place to start. > > Master number (which is here would be either 1 or 0) should not affect > as long as they are connected to the same AHB bus (I would be > surprised if they are not). I think they are not. The relevant part of the block diagram for the 460EX looks something like this: +-----+ | CPU | +-----+ | +---------------+ | BUS | +---------------+ | | +-----+ +-----+ | DMA | | RAM | +-----+ +-----+ | +------+ | SATA | +------+ The DMA-SATA link is private and ignores the address, which is the only reason the driver can possibly work (it's programming a CPU virtual address there). >> Also, the manual says the LLP_SRC_EN >> and LLP_DST_EN flags should be cleared on the last in a chain of blocks. >> The old sata_dwc driver does this whereas dw_dma does not. > > Easy to fix, however I can't get how it might affect. >>From the Atmel doc: In Table 17-1 on page 185, all other combinations of LLPx.LOC = 0, CTLx.LLP_S_EN, CFGx.RELOAD_SR, CTLx.LLP_D_EN, and CFGx.RELOAD_DS are illegal, and causes indeterminate or erroneous behavior. Most likely nothing happens, but I think it ought to be fixed. In fact, I have a patch already. Come to think of it, I have an AVR32 dev somewhere. Maybe I should dust it off. -- Måns Rullgård