From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AEDA243DD for ; Thu, 23 Jun 2022 05:45:03 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 57607C385A2 for ; Thu, 23 Jun 2022 05:45:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1655963103; bh=lsdYuH5ykpyK1Azm0bKRUvSZXtB9k4u1gftrC0YtR9E=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=g4nIaOGsnqWIDyAW/YvFVtjcJrWwlnqWUgrv7EAWfU3/gr6wmk/dkzEawvID9MTFy dO6HDX6N0hgExxX+d5bx/3ma7WH0/rET3VHrR45Fh0kLclAx3S0DqwwwlQQ+hMKIIW TgTXmELhjoK/AvOjon66ekcQWsIWMOy39BQEob63dGROYEtiS3gz8/dGCR6U8ZkZlx eIQ956l9CBBs7CXfeMeEubsbxrQ/a3THt2A1gVtBewu41aYJmpU4T23B8djPCaQZPi Ph5jNkvVW16G8IAPedG0rZ88iGhqQ6HA56YvwXTSYtEXmTvP4XQO4LV15JUgmmCE/0 X5jtD0k49tBLg== Received: by mail-ua1-f42.google.com with SMTP id q1so7143251uao.1 for ; Wed, 22 Jun 2022 22:45:03 -0700 (PDT) X-Gm-Message-State: AJIora/4d+xWC0Tq4vGNRZ58uaSVsC6MkFdU3uOjnCsZe7hMW0odK7Ik FdznD9acP77R0WXsuaMAt4Z/vQUvC2FiDWFMbiA= X-Google-Smtp-Source: AGRyM1uZPDBwG+Q8g9KVZWvxspAYumMtAf6Bjn6+q7FYVDP0zTakjJRo/w8SZzt0A99YIhv0leznYxvzhFrWGC68+mk= X-Received: by 2002:a9f:23c2:0:b0:365:958:e807 with SMTP id 60-20020a9f23c2000000b003650958e807mr3581512uao.114.1655963102215; Wed, 22 Jun 2022 22:45:02 -0700 (PDT) Precedence: bulk X-Mailing-List: loongarch@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20220623044752.2074066-1-chenhuacai@loongson.cn> <20220623044752.2074066-2-chenhuacai@loongson.cn> In-Reply-To: <20220623044752.2074066-2-chenhuacai@loongson.cn> From: Guo Ren Date: Thu, 23 Jun 2022 13:44:51 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH V2 2/2] LoongArch: Add qspinlock support To: Huacai Chen Cc: Arnd Bergmann , Huacai Chen , loongarch@lists.linux.dev, linux-arch , Xuefeng Li , Xuerui Wang , Jiaxun Yang , Peter Zijlstra , Will Deacon , Ingo Molnar , Rui Wang Content-Type: text/plain; charset="UTF-8" On Thu, Jun 23, 2022 at 12:46 PM Huacai Chen wrote: > > On NUMA system, the performance of qspinlock is better than generic > spinlock. Below is the UnixBench test results on a 8 nodes (4 cores > per node, 32 cores in total) machine. > > A. With generic spinlock: > > System Benchmarks Index Values BASELINE RESULT INDEX > Dhrystone 2 using register variables 116700.0 449574022.5 38523.9 > Double-Precision Whetstone 55.0 85190.4 15489.2 > Execl Throughput 43.0 14696.2 3417.7 > File Copy 1024 bufsize 2000 maxblocks 3960.0 143157.8 361.5 > File Copy 256 bufsize 500 maxblocks 1655.0 37631.8 227.4 > File Copy 4096 bufsize 8000 maxblocks 5800.0 444814.2 766.9 > Pipe Throughput 12440.0 5047490.7 4057.5 > Pipe-based Context Switching 4000.0 2021545.7 5053.9 > Process Creation 126.0 23829.8 1891.3 > Shell Scripts (1 concurrent) 42.4 33756.7 7961.5 > Shell Scripts (8 concurrent) 6.0 4062.9 6771.5 > System Call Overhead 15000.0 2479748.6 1653.2 > ======== > System Benchmarks Index Score 2955.6 > > B. With qspinlock: > > System Benchmarks Index Values BASELINE RESULT INDEX > Dhrystone 2 using register variables 116700.0 449467876.9 38514.8 > Double-Precision Whetstone 55.0 85174.6 15486.3 > Execl Throughput 43.0 14769.1 3434.7 > File Copy 1024 bufsize 2000 maxblocks 3960.0 146150.5 369.1 > File Copy 256 bufsize 500 maxblocks 1655.0 37496.8 226.6 > File Copy 4096 bufsize 8000 maxblocks 5800.0 447527.0 771.6 > Pipe Throughput 12440.0 5175989.2 4160.8 > Pipe-based Context Switching 4000.0 2207747.8 5519.4 > Process Creation 126.0 25125.5 1994.1 > Shell Scripts (1 concurrent) 42.4 33461.2 7891.8 > Shell Scripts (8 concurrent) 6.0 4024.7 6707.8 > System Call Overhead 15000.0 2917278.6 1944.9 > ======== > System Benchmarks Index Score 3040.1 > > Signed-off-by: Rui Wang > Signed-off-by: Huacai Chen > --- > arch/loongarch/Kconfig | 1 + > arch/loongarch/include/asm/Kbuild | 5 ++--- > arch/loongarch/include/asm/spinlock.h | 12 ++++++++++++ > arch/loongarch/include/asm/spinlock_types.h | 11 +++++++++++ > 4 files changed, 26 insertions(+), 3 deletions(-) > create mode 100644 arch/loongarch/include/asm/spinlock.h > create mode 100644 arch/loongarch/include/asm/spinlock_types.h > > diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig > index 1920d52653b4..1ec220df751d 100644 > --- a/arch/loongarch/Kconfig > +++ b/arch/loongarch/Kconfig > @@ -46,6 +46,7 @@ config LOONGARCH > select ARCH_USE_BUILTIN_BSWAP > select ARCH_USE_CMPXCHG_LOCKREF > select ARCH_USE_QUEUED_RWLOCKS > + select ARCH_USE_QUEUED_SPINLOCKS > select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT > select ARCH_WANTS_NO_INSTR > select BUILDTIME_TABLE_SORT > diff --git a/arch/loongarch/include/asm/Kbuild b/arch/loongarch/include/asm/Kbuild > index 83bc0681e72b..a0eed6076c79 100644 > --- a/arch/loongarch/include/asm/Kbuild > +++ b/arch/loongarch/include/asm/Kbuild > @@ -1,12 +1,11 @@ > # SPDX-License-Identifier: GPL-2.0 > generic-y += dma-contiguous.h > generic-y += export.h > +generic-y += mcs_spinlock.h > generic-y += parport.h > generic-y += early_ioremap.h > generic-y += qrwlock.h > -generic-y += qrwlock_types.h > -generic-y += spinlock.h > -generic-y += spinlock_types.h Could you base the patch on [1]? [1] https://lore.kernel.org/linux-riscv/20220621144920.2945595-2-guoren@kernel.org/raw And keep the spinlock.h & spinlock_types.h in your Kconfig. > +generic-y += qspinlock.h > generic-y += rwsem.h > generic-y += segment.h > generic-y += user.h > diff --git a/arch/loongarch/include/asm/spinlock.h b/arch/loongarch/include/asm/spinlock.h > new file mode 100644 > index 000000000000..7cb3476999be > --- /dev/null > +++ b/arch/loongarch/include/asm/spinlock.h > @@ -0,0 +1,12 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited > + */ > +#ifndef _ASM_SPINLOCK_H > +#define _ASM_SPINLOCK_H > + > +#include > +#include > +#include > + > +#endif /* _ASM_SPINLOCK_H */ > diff --git a/arch/loongarch/include/asm/spinlock_types.h b/arch/loongarch/include/asm/spinlock_types.h > new file mode 100644 > index 000000000000..7458d036c161 > --- /dev/null > +++ b/arch/loongarch/include/asm/spinlock_types.h > @@ -0,0 +1,11 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited > + */ > +#ifndef _ASM_SPINLOCK_TYPES_H > +#define _ASM_SPINLOCK_TYPES_H > + > +#include > +#include > + > +#endif > -- > 2.27.0 > -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/