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From: Hans de Goede <hdegoede@redhat.com>
To: "Matwey V. Kornilov" <matwey.kornilov@gmail.com>
Cc: andriy.shevchenko@linux.intel.com, carlo@endlessm.com,
	davem@davemloft.net, hkallweit1@gmail.com, js@sig21.net,
	linux-clk@vger.kernel.org, linux-wireless@vger.kernel.org,
	mturquette@baylibre.com, netdev@vger.kernel.org,
	pierre-louis.bossart@linux.intel.com, sboyd@kernel.org
Subject: Re: [BISECTED] igb initialization failure on Bay Trail
Date: Wed, 27 Jul 2022 14:18:53 +0200	[thread overview]
Message-ID: <08c744e6-385b-8fcf-ecdf-1292b5869f94@redhat.com> (raw)
In-Reply-To: <20220724210037.3906-1-matwey.kornilov@gmail.com>

Hi Paul,

On 7/24/22 23:00, Matwey V. Kornilov wrote:
> Hello,
> 
> I've just found that the following commit
> 
>     648e921888ad ("clk: x86: Stop marking clocks as CLK_IS_CRITICAL")
> 
> breaks the ethernet on my Lex 3I380CW (Atom E3845) motherboard. The board is
> equipped with dual Intel I211 based 1Gbps copper ethernet.
> 
> Before the commit I see the following:
> 
>      igb 0000:01:00.0: added PHC on eth0
>      igb 0000:01:00.0: Intel(R) Gigabit Ethernet Network Connection
>      igb 0000:01:00.0: eth0: (PCIe:2.5Gb/s:Width x1) 4c:02:89:10:02:e4
>      igb 0000:01:00.0: eth0: PBA No: FFFFFF-0FF
>      igb 0000:01:00.0: Using MSI-X interrupts. 2 rx queue(s), 2 tx queue(s)
>      igb 0000:02:00.0: added PHC on eth1
>      igb 0000:02:00.0: Intel(R) Gigabit Ethernet Network Connection
>      igb 0000:02:00.0: eth1: (PCIe:2.5Gb/s:Width x1) 4c:02:89:10:02:e5
>      igb 0000:02:00.0: eth1: PBA No: FFFFFF-0FF
>      igb 0000:02:00.0: Using MSI-X interrupts. 2 rx queue(s), 2 tx queue(s)
> 
> while when the commit is applied I see the following:
> 
>      igb 0000:01:00.0: added PHC on eth0
>      igb 0000:01:00.0: Intel(R) Gigabit Ethernet Network Connection
>      igb 0000:01:00.0: eth0: (PCIe:2.5Gb/s:Width x1) 4c:02:89:10:02:e4
>      igb 0000:01:00.0: eth0: PBA No: FFFFFF-0FF
>      igb 0000:01:00.0: Using MSI-X interrupts. 2 rx queue(s), 2 tx queue(s)
>      igb: probe of 0000:02:00.0 failed with error -2
> 
> Please note, that the second ethernet initialization is failed.
> 
> 
> See also: http://www.lex.com.tw/products/pdf/3I380A&3I380CW.pdf

Yes some boards use more then 1 clk for the ethernet and do not take
care of enabling/disabling the clk in their ACPI.

As Pierre-Louis mentioned already the disabling of the clocks is necessary
to make 100-s of different (tablet) models suspend properly.

Unfortunately this is known to break ethernet on some boards. As a workaround
we use DMI quirks on those few boards to keep the clocks enabled there, see:

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/platform/x86/pmc_atom.c#n381

If you can submit a patch adding your board to this DMI table, then I will
merge it and get it on its way to Linus Torvalds asap.

If you instead want me to write the patch for you, please run:

sudo dmidecode > dmidecode.txt

And attach the generated dmidecode.txt file to your next email.

Regards,

Hans


  parent reply	other threads:[~2022-07-27 12:19 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-12  9:34 [PATCH v2 0/3] r8169 (x86) clk fixes to fix S0ix not being reached Hans de Goede
2018-09-12  9:34 ` [PATCH v2 1/3] clk: x86: add "ether_clk" alias for Bay Trail / Cherry Trail Hans de Goede
     [not found] ` <20180912093456.23400-1-hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2018-09-12  9:34   ` [PATCH v2 2/3] r8169: Get and enable optional ether_clk clock Hans de Goede
2018-09-12  9:34 ` [PATCH v2 3/3] clk: x86: Stop marking clocks as CLK_IS_CRITICAL Hans de Goede
2022-07-24 21:00   ` [BISECTED] igb initialization failure on Bay Trail Matwey V. Kornilov
2022-07-25 15:32     ` Pierre-Louis Bossart
2022-07-26  9:15       ` Matwey V. Kornilov
2022-07-27 12:18     ` Hans de Goede [this message]
2018-09-18  1:48 ` [PATCH v2 0/3] r8169 (x86) clk fixes to fix S0ix not being reached David Miller

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