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From: Jamie Iles <jamie@jamieiles.com>
To: netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Cc: plagnioj@jcrosoft.com, Jamie Iles <jamie@jamieiles.com>
Subject: [PATCHv3 6/9] macb: support higher rate GEM MDIO clock divisors
Date: Tue,  9 Aug 2011 10:16:48 +0100	[thread overview]
Message-ID: <1312881411-2376-7-git-send-email-jamie@jamieiles.com> (raw)
In-Reply-To: <1312881411-2376-1-git-send-email-jamie@jamieiles.com>

GEM devices support larger clock divisors and have a different
range of divisors.  Program the MDIO clock divisors based on the
device type.

Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: David S. Miller <davem@davemloft.net>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
 drivers/net/macb.c |   55 +++++++++++++++++++++++++++++++++++++++++----------
 drivers/net/macb.h |   11 ++++++++++
 2 files changed, 55 insertions(+), 11 deletions(-)

diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index 0b48a0b..fce88f9 100644
--- a/drivers/net/macb.c
+++ b/drivers/net/macb.c
@@ -794,6 +794,48 @@ static void macb_reset_hw(struct macb *bp)
 	macb_readl(bp, ISR);
 }
 
+static u32 gem_mdc_clk_div(struct macb *bp)
+{
+	u32 config;
+	unsigned long pclk_hz = clk_get_rate(bp->pclk);
+
+	if (pclk_hz <= 20000000)
+		config = GEM_BF(CLK, GEM_CLK_DIV8);
+	else if (pclk_hz <= 40000000)
+		config = GEM_BF(CLK, GEM_CLK_DIV16);
+	else if (pclk_hz <= 80000000)
+		config = GEM_BF(CLK, GEM_CLK_DIV32);
+	else if (pclk_hz <= 120000000)
+		config = GEM_BF(CLK, GEM_CLK_DIV48);
+	else if (pclk_hz <= 160000000)
+		config = GEM_BF(CLK, GEM_CLK_DIV64);
+	else
+		config = GEM_BF(CLK, GEM_CLK_DIV96);
+
+	return config;
+}
+
+static u32 macb_mdc_clk_div(struct macb *bp)
+{
+	u32 config;
+	unsigned long pclk_hz;
+
+	if (macb_is_gem(bp))
+		return gem_mdc_clk_div(bp);
+
+	pclk_hz = clk_get_rate(bp->pclk);
+	if (pclk_hz <= 20000000)
+		config = MACB_BF(CLK, MACB_CLK_DIV8);
+	else if (pclk_hz <= 40000000)
+		config = MACB_BF(CLK, MACB_CLK_DIV16);
+	else if (pclk_hz <= 80000000)
+		config = MACB_BF(CLK, MACB_CLK_DIV32);
+	else
+		config = MACB_BF(CLK, MACB_CLK_DIV64);
+
+	return config;
+}
+
 static void macb_init_hw(struct macb *bp)
 {
 	u32 config;
@@ -801,7 +843,7 @@ static void macb_init_hw(struct macb *bp)
 	macb_reset_hw(bp);
 	__macb_set_hwaddr(bp);
 
-	config = macb_readl(bp, NCFGR) & MACB_BF(CLK, -1L);
+	config = macb_mdc_clk_div(bp);
 	config |= MACB_BIT(PAE);		/* PAuse Enable */
 	config |= MACB_BIT(DRFCS);		/* Discard Rx FCS */
 	config |= MACB_BIT(BIG);		/* Receive oversized frames */
@@ -1120,7 +1162,6 @@ static int __init macb_probe(struct platform_device *pdev)
 	struct net_device *dev;
 	struct macb *bp;
 	struct phy_device *phydev;
-	unsigned long pclk_hz;
 	u32 config;
 	int err = -ENXIO;
 
@@ -1184,15 +1225,7 @@ static int __init macb_probe(struct platform_device *pdev)
 	dev->base_addr = regs->start;
 
 	/* Set MII management clock divider */
-	pclk_hz = clk_get_rate(bp->pclk);
-	if (pclk_hz <= 20000000)
-		config = MACB_BF(CLK, MACB_CLK_DIV8);
-	else if (pclk_hz <= 40000000)
-		config = MACB_BF(CLK, MACB_CLK_DIV16);
-	else if (pclk_hz <= 80000000)
-		config = MACB_BF(CLK, MACB_CLK_DIV32);
-	else
-		config = MACB_BF(CLK, MACB_CLK_DIV64);
+	config = macb_mdc_clk_div(bp);
 	macb_writel(bp, NCFGR, config);
 
 	macb_get_hwaddr(bp);
diff --git a/drivers/net/macb.h b/drivers/net/macb.h
index d50057c..354ed8f 100644
--- a/drivers/net/macb.h
+++ b/drivers/net/macb.h
@@ -135,6 +135,9 @@
 #define MACB_IRXFCS_OFFSET			19
 #define MACB_IRXFCS_SIZE			1
 
+/* GEM specific NCFGR bitfields. */
+#define GEM_CLK_OFFSET				18
+#define GEM_CLK_SIZE				3
 /* Bitfields in NSR */
 #define MACB_NSR_LINK_OFFSET			0
 #define MACB_NSR_LINK_SIZE			1
@@ -249,6 +252,14 @@
 #define MACB_CLK_DIV32				2
 #define MACB_CLK_DIV64				3
 
+/* GEM specific constants for CLK. */
+#define GEM_CLK_DIV8				0
+#define GEM_CLK_DIV16				1
+#define GEM_CLK_DIV32				2
+#define GEM_CLK_DIV48				3
+#define GEM_CLK_DIV64				4
+#define GEM_CLK_DIV96				5
+
 /* Constants for MAN register */
 #define MACB_MAN_SOF				1
 #define MACB_MAN_WRITE				1
-- 
1.7.4.1


  parent reply	other threads:[~2011-08-09  9:18 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-08-09  9:16 [PATCHv3 0/9] macb: add support for Cadence GEM Jamie Iles
2011-08-09  9:16 ` [PATCHv3 1/9] at91: provide macb clks with "pclk" and "hclk" name Jamie Iles
2011-08-09 14:49   ` Jean-Christophe PLAGNIOL-VILLARD
2011-08-09 14:51   ` [PATCH 1/9 v4] " Jean-Christophe PLAGNIOL-VILLARD
2011-08-09  9:16 ` [PATCHv3 2/9] macb: remove conditional clk handling Jamie Iles
2011-08-09 14:52   ` Jean-Christophe PLAGNIOL-VILLARD
2011-08-09  9:16 ` [PATCHv3 3/9] macb: unify at91 and avr32 platform data Jamie Iles
2011-08-09 14:53   ` Jean-Christophe PLAGNIOL-VILLARD
2011-08-09  9:16 ` [PATCHv3 4/9] macb: convert printk to netdev_ and friends Jamie Iles
2011-08-09 20:20   ` Joe Perches
2011-08-11  9:01     ` Jamie Iles
2011-08-09  9:16 ` [PATCHv3 5/9] macb: initial support for Cadence GEM Jamie Iles
2011-08-09 14:55   ` Jean-Christophe PLAGNIOL-VILLARD
2011-08-09  9:16 ` Jamie Iles [this message]
2011-08-09 14:56   ` [PATCHv3 6/9] macb: support higher rate GEM MDIO clock divisors Jean-Christophe PLAGNIOL-VILLARD
2011-08-09  9:16 ` [PATCHv3 7/9] macb: support statistics for GEM devices Jamie Iles
2011-08-09 14:57   ` Jean-Christophe PLAGNIOL-VILLARD
2011-08-09  9:16 ` [PATCHv3 8/9] macb: support DMA bus widths > 32 bits Jamie Iles
2011-08-09 14:57   ` Jean-Christophe PLAGNIOL-VILLARD
2011-08-09  9:16 ` [PATCHv3 9/9] macb: allow GEM to have configurable receive buffer size Jamie Iles
2011-08-09 14:59   ` Jean-Christophe PLAGNIOL-VILLARD
2011-08-09 14:59 ` [PATCHv3 0/9] macb: add support for Cadence GEM Jean-Christophe PLAGNIOL-VILLARD
2011-08-11  9:21   ` Jamie Iles
2011-08-23  9:34   ` Jamie Iles
2011-08-28  6:08     ` Jean-Christophe PLAGNIOL-VILLARD

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