From: Jiri Pirko <jiri@resnulli.us>
To: netdev@vger.kernel.org
Cc: davem@davemloft.net, idosch@mellanox.com, mlxsw@mellanox.com
Subject: [patch net 2/2] mlxsw: reg: Fix SPVMLR max record count
Date: Tue, 14 Mar 2017 14:00:01 +0100 [thread overview]
Message-ID: <1489496401-4820-3-git-send-email-jiri@resnulli.us> (raw)
In-Reply-To: <1489496401-4820-1-git-send-email-jiri@resnulli.us>
From: Jiri Pirko <jiri@mellanox.com>
The num_rec field is 8 bit, so the maximal count number is 255.
This fixes vlans learning not being enabled for wider ranges than 255.
Fixes: a4feea74cd7a ("mlxsw: reg: Add Switch Port VLAN MAC Learning register definition")
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
---
drivers/net/ethernet/mellanox/mlxsw/reg.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index 65e1942..d9616da 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -1702,7 +1702,7 @@ static inline void mlxsw_reg_sfmr_pack(char *payload,
#define MLXSW_REG_SPVMLR_ID 0x2020
#define MLXSW_REG_SPVMLR_BASE_LEN 0x04 /* base length, without records */
#define MLXSW_REG_SPVMLR_REC_LEN 0x04 /* record length */
-#define MLXSW_REG_SPVMLR_REC_MAX_COUNT 256
+#define MLXSW_REG_SPVMLR_REC_MAX_COUNT 255
#define MLXSW_REG_SPVMLR_LEN (MLXSW_REG_SPVMLR_BASE_LEN + \
MLXSW_REG_SPVMLR_REC_LEN * \
MLXSW_REG_SPVMLR_REC_MAX_COUNT)
--
2.7.4
next prev parent reply other threads:[~2017-03-14 13:00 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-14 12:59 [patch net 0/2] mlxsw: Couple of fixes Jiri Pirko
2017-03-14 13:00 ` [patch net 1/2] mlxsw: reg: Fix SPVM max record count Jiri Pirko
2017-03-14 13:00 ` Jiri Pirko [this message]
2017-03-14 18:35 ` [patch net 0/2] mlxsw: Couple of fixes David Miller
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