From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sinan Kaya Subject: [PATCH v3 04/18] igb: eliminate duplicate barriers on weakly-ordered archs Date: Fri, 16 Mar 2018 12:16:17 -0400 Message-ID: <1521216991-28706-5-git-send-email-okaya@codeaurora.org> References: <1521216991-28706-1-git-send-email-okaya@codeaurora.org> Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Cc: linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sinan Kaya , Jeff Kirsher , intel-wired-lan@lists.osuosl.org, linux-kernel@vger.kernel.org To: netdev@vger.kernel.org, timur@codeaurora.org, sulrich@codeaurora.org Return-path: In-Reply-To: <1521216991-28706-1-git-send-email-okaya@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org List-Id: netdev.vger.kernel.org Code includes wmb() followed by writel(). writel() already has a barrier on some architectures like arm64. This ends up CPU observing two barriers back to back before executing the register write. Since code already has an explicit barrier call, changing writel() to writel_relaxed(). Signed-off-by: Sinan Kaya --- drivers/net/ethernet/intel/igb/igb_main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c index b88fae7..82aea92 100644 --- a/drivers/net/ethernet/intel/igb/igb_main.c +++ b/drivers/net/ethernet/intel/igb/igb_main.c @@ -5671,7 +5671,7 @@ static int igb_tx_map(struct igb_ring *tx_ring, igb_maybe_stop_tx(tx_ring, DESC_NEEDED); if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) { - writel(i, tx_ring->tail); + writel_relaxed(i, tx_ring->tail); /* we need this if more than one processor can write to our tail * at a time, it synchronizes IO on IA64/Altix systems @@ -8072,7 +8072,7 @@ void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count) * such as IA-64). */ wmb(); - writel(i, rx_ring->tail); + writel_relaxed(i, rx_ring->tail); } } -- 2.7.4