From: Vitaly Gaiduk <vitaly.gaiduk@cloudbear.ru>
To: davem@davemloft.net, robh+dt@kernel.org, f.fainelli@gmail.com
Cc: Vitaly Gaiduk <vitaly.gaiduk@cloudbear.ru>,
Mark Rutland <mark.rutland@arm.com>,
Trent Piepho <tpiepho@impinj.com>, Andrew Lunn <andrew@lunn.ch>,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v3 1/2] net: phy: dp83867: Add documentation for SGMII mode type
Date: Mon, 9 Sep 2019 19:52:19 +0300 [thread overview]
Message-ID: <1568047940-14490-2-git-send-email-vitaly.gaiduk@cloudbear.ru> (raw)
In-Reply-To: <1568047940-14490-1-git-send-email-vitaly.gaiduk@cloudbear.ru>
Add documentation of ti,sgmii-ref-clock-output-enable
which can be used to select SGMII mode type (4 or 6-wire).
Signed-off-by: Vitaly Gaiduk <vitaly.gaiduk@cloudbear.ru>
---
Documentation/devicetree/bindings/net/ti,dp83867.txt | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/ti,dp83867.txt b/Documentation/devicetree/bindings/net/ti,dp83867.txt
index db6aa3f..c98c682 100644
--- a/Documentation/devicetree/bindings/net/ti,dp83867.txt
+++ b/Documentation/devicetree/bindings/net/ti,dp83867.txt
@@ -37,6 +37,10 @@ Optional property:
for applicable values. The CLK_OUT pin can also
be disabled by this property. When omitted, the
PHY's default will be left as is.
+ - ti,sgmii-ref-clock-output-enable - This denotes the fact which
+ SGMII configuration is used (4 or 6-wire modes).
+ Some MACs work with differential SGMII clock.
+ See data manual for details.
Note: ti,min-output-impedance and ti,max-output-impedance are mutually
exclusive. When both properties are present ti,max-output-impedance
--
2.7.4
next prev parent reply other threads:[~2019-09-09 16:52 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-05 16:25 [PATCH 2/2] net: phy: dp83867: Add SGMII mode type switching Vitaly Gaiduk
2019-09-05 16:26 ` [PATCH 1/2] net: phy: dp83867: Add documentation for SGMII mode type Vitaly Gaiduk
2019-09-05 17:06 ` Trent Piepho
2019-09-06 19:29 ` Andrew Lunn
2019-09-06 20:45 ` Vitaly Gaiduk
2019-09-07 15:41 ` Florian Fainelli
2019-09-07 15:24 ` David Miller
2019-09-07 15:39 ` Andrew Lunn
[not found] ` <2894361567896439@iva5-be053096037b.qloud-c.yandex.net>
2019-09-08 8:54 ` Andrew Lunn
2019-09-09 11:07 ` Vitaly Gaiduk
2019-09-09 11:02 ` [PATCH v2 2/2] net: phy: dp83867: Add SGMII mode type switching Vitaly Gaiduk
2019-09-09 11:02 ` [PATCH v2 1/2] net: phy: dp83867: Add documentation for SGMII mode type Vitaly Gaiduk
2019-09-09 14:23 ` [PATCH v2 2/2] net: phy: dp83867: Add SGMII mode type switching Florian Fainelli
2019-09-09 16:02 ` [PATCH v3] " Vitaly Gaiduk
2019-09-09 16:40 ` Florian Fainelli
2019-09-09 16:52 ` [PATCH v3 2/2] " Vitaly Gaiduk
2019-09-09 16:52 ` Vitaly Gaiduk [this message]
2019-09-09 16:56 ` [PATCH v3 1/2] net: phy: dp83867: Add documentation for SGMII mode type Florian Fainelli
2019-09-09 17:19 ` [PATCH v4 2/2] net: phy: dp83867: Add SGMII mode type switching Vitaly Gaiduk
2019-09-09 17:19 ` [PATCH v4 1/2] net: phy: dp83867: Add documentation for SGMII mode type Vitaly Gaiduk
2019-09-11 22:37 ` David Miller
2019-09-09 17:40 ` [PATCH v4 2/2] net: phy: dp83867: Add SGMII mode type switching Trent Piepho
2019-09-11 22:37 ` David Miller
2019-09-12 10:17 ` Vitaly Gaiduk
2019-09-09 16:56 ` [PATCH v3 " Florian Fainelli
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