From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A1D17C433DB for ; Sun, 31 Jan 2021 15:19:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6FD0F64E35 for ; Sun, 31 Jan 2021 15:19:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232458AbhAaPSj (ORCPT ); Sun, 31 Jan 2021 10:18:39 -0500 Received: from mx0a-0016f401.pphosted.com ([67.231.148.174]:38262 "EHLO mx0b-0016f401.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S231469AbhAaOfv (ORCPT ); Sun, 31 Jan 2021 09:35:51 -0500 Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 10VEUHED009095; Sun, 31 Jan 2021 06:35:01 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=5lKn6Ecz4xGgCyyvpqKHZ0HmmgVVSCgpayo06pbd8FA=; b=ZO6NqSOf/iDANpbDW9VIV8ZptkPeh5orlPUdIytPPE0XikM2tw085FVGytSdGciNMOhs AKocg053RssW15Hw9ab7yK/g8PRRBazv5Z1/eVJoc7PD5YB1LTMLJRIuRUg2HPErkG2w R48ePezWCDx5KRXW/eOKDaM9zlm67qcvO1pHAi5dLR/ABWpgjTTGaeUFNGOK+TAcdGOt YKtA2v4bQsTl0Wi2eWieCMYlOrldPPWyH1c+EktfFP8y04zhgkx1j3M7jgCLMXX79RjB 9X3hh0eDSt5DfT64aL5Pv8pEl+P4KIX4A8AKj8OYsk/pXJfvXkRSHTaVaF3vuLKr43yW DA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com with ESMTP id 36d5pssw0c-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Sun, 31 Jan 2021 06:35:01 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sun, 31 Jan 2021 06:34:59 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sun, 31 Jan 2021 06:34:59 -0800 Received: from stefan-pc.marvell.com (stefan-pc.marvell.com [10.5.25.21]) by maili.marvell.com (Postfix) with ESMTP id 8D52F3F703F; Sun, 31 Jan 2021 06:34:56 -0800 (PST) From: To: CC: , , , , , , , , , , , , Konstantin Porotchkin Subject: [PATCH v7 net-next 02/15] dts: marvell: add CM3 SRAM memory to cp115 ethernet device tree Date: Sun, 31 Jan 2021 16:33:45 +0200 Message-ID: <1612103638-16108-3-git-send-email-stefanc@marvell.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1612103638-16108-1-git-send-email-stefanc@marvell.com> References: <1612103638-16108-1-git-send-email-stefanc@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369,18.0.737 definitions=2021-01-31_04:2021-01-29,2021-01-31 signatures=0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Konstantin Porotchkin CM3 SRAM address space would be used for Flow Control configuration. Signed-off-by: Stefan Chulski Signed-off-by: Konstantin Porotchkin --- arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi index 9dcf16b..359cf42 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi @@ -69,6 +69,8 @@ status = "disabled"; dma-coherent; + cm3-mem = <&CP11X_LABEL(cm3_sram)>; + CP11X_LABEL(eth0): eth0 { interrupts = <39 IRQ_TYPE_LEVEL_HIGH>, <43 IRQ_TYPE_LEVEL_HIGH>, @@ -211,6 +213,14 @@ }; }; + CP11X_LABEL(cm3_sram): cm3@220000 { + compatible = "mmio-sram"; + reg = <0x220000 0x800>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x220000 0x800>; + }; + CP11X_LABEL(rtc): rtc@284000 { compatible = "marvell,armada-8k-rtc"; reg = <0x284000 0x20>, <0x284080 0x24>; -- 1.9.1