[PATCH 0/4] dt-bindings: imx: add nvmem property

[PATCH 0/4] dt-bindings: imx: add nvmem property

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

To i.MX SoC, there are many variants, such as i.MX8M Plus which
feature 4 A53, GPU, VPU, SDHC, FLEXCAN, FEC, eQOS and etc.
But i.MX8M Plus has many parts, one part may not have FLEXCAN,
the other part may not have eQOS or GPU.
But we use one device tree to support i.MX8MP including its parts,
then we need update device tree to mark the disabled IP status "disabled".

In NXP U-Boot, we hardcoded node path and runtime update device tree
status in U-Boot according to fuse value. But this method is not
scalable and need encoding all the node paths that needs check.

By introducing nvmem property for each node that needs runtime update
status property accoridng fuse value, we could use one Bootloader
code piece to support all i.MX SoCs.

The drawback is we need nvmem property for all the nodes which maybe
fused out.

Rob:
  I only include limited node bindings in this patchset, and not
  include device tree patch. Just wanna to see whether you
  agree this approach. If you agree, I'll later post device tree
  part and other dt-bindings update, such as MU, USB and etc.

  Thanks.

Example as below:

			flexcan1: can@308c0000 {
				....
				nvmem-cells = <&flexcan_disabled>;
				nvmem-cell-names = "disabled";
			};

			flexcan2: can@308d0000 {
				....
				nvmem-cells = <&flexcan_disabled>;
				nvmem-cell-names = "disabled";
			};

			ocotp: efuse@30350000 {
				compatible = "fsl,imx8mp-ocotp", "fsl,imx8mm-ocotp", "syscon";
				reg = <0x30350000 0x10000>;
				clocks = <&clk IMX8MP_CLK_OCOTP_ROOT>;
				/* For nvmem subnodes */
				#address-cells = <1>;
				#size-cells = <1>;

				m7_disabled: m7@10 {
					reg = <0x10 4>;
					bits = <21 1>;
				};

				g1_disabled: g1@10 {
					reg = <0x10 4>;
					bits = <24 1>;
				};

				g2_disabled: g2@10 {
					reg = <0x10 4>;
					bits = <25 1>;
				};

				can_disabled: can@10 {
					reg = <0x10 4>;
					bits = <28 1>;
				};

				canfd_disabled: canfd@10 {
					reg = <0x10 4>;
					bits = <29 1>;
				};

				vc8000e_disabled: vc8000e@10 {
					reg = <0x10 4>;
					bits = <30 1>;
				};

				isp1_disabled: isp1@10 {
					reg = <0x14 4>;
					bits = <0 1>;
				};

				isp2_disabled: isp2@10 {
					reg = <0x14 4>;
					bits = <1 1>;
				};

				dewrap_disabled: dewrap@10 {
					reg = <0x14 4>;
					bits = <2 1>;
				};

				npu_disabled: dewrap@10 {
					reg = <0x14 4>;
					bits = <3 1>;
				};

				dsp_disabled: dewrap@10 {
					reg = <0x14 4>;
					bits = <4 1>;
				};

				asrc_disabled: dewrap@10 {
					reg = <0x14 4>;
					bits = <5 1>;
				};

				gpu2d_disabled: gpu2d@10 {
					reg = <0x14 4>;
					bits = <6 1>;
				};

				gpu3d_disabled: gpu3d@10 {
					reg = <0x14 4>;
					bits = <7 1>;
				};

				usb1_disabled: usb1@10 {
					reg = <0x14 4>;
					bits = <8 1>;
				};

				usb2_disabled: usb2@10 {
					reg = <0x14 4>;
					bits = <9 1>;
				};

				pcie1_disabled: pcie1@10 {
					reg = <0x14 4>;
					bits = <11 1>;
				};

				enet1_disabled: enet1@10 {
					reg = <0x14 4>;
					bits = <13 1>;
				};

				enet2_disabled: enet2@10 {
					reg = <0x14 4>;
					bits = <14 1>;
				};

				csi1_disabled: csi1@10 {
					reg = <0x14 4>;
					bits = <15 1>;
				};

				csi2_disabled: csi1@10 {
					reg = <0x14 4>;
					bits = <16 1>;
				};

				dsi1_disabled: dsi1@10 {
					reg = <0x14 4>;
					bits = <17 1>;
				};

				lvds1_disabled: lvds1@10 {
					reg = <0x14 4>;
					bits = <19 1>;
				};

				lvds2_disabled: lvds1@10 {
					reg = <0x14 4>;
					bits = <19 1>;
				};

				eth_mac1: mac-address@90 {
					reg = <0x90 6>;
				};

				eth_mac2: mac-address@96 {
					reg = <0x96 6>;
				};

			};


Peng Fan (4):
  dt-bindings: can: fsl,flexcan: introduce nvmem property
  dt-bindings: net: fsl,fec: introduce nvmem property
  dt-bindings: mmc: imx-esdhc: introduce nvmem property
  dt-bindings: net: imx-dwmac: introduce nvmem property

 Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml | 9 +++++++++
 .../devicetree/bindings/net/can/fsl,flexcan.yaml         | 9 +++++++++
 Documentation/devicetree/bindings/net/fsl,fec.yaml       | 9 +++++++++
 Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml | 9 +++++++++
 4 files changed, 36 insertions(+)

-- 
2.35.1

[PATCH 1/4] dt-bindings: can: fsl,flexcan: introduce nvmem property

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

To i.MX8MP variants, flexcan maybe fused out. Bootloader could use
this property to read out the fuse value and mark the node status
at runtime.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 .../devicetree/bindings/net/can/fsl,flexcan.yaml         | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml
index e52db841bb8c..0f553fdf8cb2 100644
--- a/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml
+++ b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml
@@ -73,6 +73,15 @@ properties:
       node then controller is assumed to be little endian. If this property is
       present then controller is assumed to be big endian.
 
+  nvmem-cells:
+    maxItems: 1
+    description:
+      Nvmem data cell that indicate whether this IP is fused or not.
+
+  nvmem-cell-names:
+    items:
+      - const: fused
+
   fsl,stop-mode:
     description: |
       Register bits of stop mode control.
-- 
2.35.1

[PATCH 2/4] dt-bindings: net: fsl,fec: introduce nvmem property

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

To i.MX8M Family variants, fec maybe fused out. Bootloader could use
this property to read out the fuse value and mark the node status
at runtime.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 Documentation/devicetree/bindings/net/fsl,fec.yaml | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/fsl,fec.yaml b/Documentation/devicetree/bindings/net/fsl,fec.yaml
index daa2f79a294f..5d18f59ca0c3 100644
--- a/Documentation/devicetree/bindings/net/fsl,fec.yaml
+++ b/Documentation/devicetree/bindings/net/fsl,fec.yaml
@@ -111,6 +111,15 @@ properties:
         - enet_out
         - enet_2x_txclk
 
+  nvmem-cells:
+    maxItems: 1
+    description:
+      Nvmem data cell that indicate whether this IP is fused or not.
+
+  nvmem-cell-names:
+    items:
+      - const: fused
+
   phy-mode: true
 
   phy-handle: true
-- 
2.35.1

[PATCH 3/4] dt-bindings: mmc: imx-esdhc: introduce nvmem property

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

To i.MX8M Family variants, sdhc maybe fused out. Bootloader could use
this property to read out the fuse value and mark the node status
at runtime.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
index 7dbbcae9485c..67dfe6d168d0 100644
--- a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
+++ b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
@@ -57,6 +57,15 @@ properties:
   interrupts:
     maxItems: 1
 
+  nvmem-cells:
+    maxItems: 1
+    description:
+      Nvmem data cell that indicate whether this IP is fused or not.
+
+  nvmem-cell-names:
+    items:
+      - const: fused
+
   fsl,wp-controller:
     description: |
       boolean, if present, indicate to use controller internal write protection.
-- 
2.35.1

[PATCH 4/4] dt-bindings: net: imx-dwmac: introduce nvmem property

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

To i.MX8M Family variants, dwmac maybe fused out. Bootloader could use
this property to read out the fuse value and mark the node status
at runtime.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml b/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml
index 011363166789..911e510d14c6 100644
--- a/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml
+++ b/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml
@@ -62,6 +62,15 @@ properties:
       Should be phandle/offset pair. The phandle to the syscon node which
       encompases the GPR register, and the offset of the GPR register.
 
+  nvmem-cells:
+    maxItems: 1
+    description:
+      Nvmem data cell that indicate whether this IP is fused or not.
+
+  nvmem-cell-names:
+    items:
+      - const: fused
+
   snps,rmii_refclk_ext:
     $ref: /schemas/types.yaml#/definitions/flag
     description:
-- 
2.35.1

Re: [PATCH 0/4] dt-bindings: imx: add nvmem property

[Uwe Kleine-König]

[-- Attachment #1: Type: text/plain, Size: 1827 bytes --]

Hello,

On Thu, Mar 24, 2022 at 12:20:20PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> To i.MX SoC, there are many variants, such as i.MX8M Plus which
> feature 4 A53, GPU, VPU, SDHC, FLEXCAN, FEC, eQOS and etc.
> But i.MX8M Plus has many parts, one part may not have FLEXCAN,
> the other part may not have eQOS or GPU.
> But we use one device tree to support i.MX8MP including its parts,
> then we need update device tree to mark the disabled IP status "disabled".
> 
> In NXP U-Boot, we hardcoded node path and runtime update device tree
> status in U-Boot according to fuse value. But this method is not
> scalable and need encoding all the node paths that needs check.
> 
> By introducing nvmem property for each node that needs runtime update
> status property accoridng fuse value, we could use one Bootloader
> code piece to support all i.MX SoCs.
> 
> The drawback is we need nvmem property for all the nodes which maybe
> fused out.

I'd rather not have that in an official binding as the syntax is
orthogonal to status = "..." but the semantic isn't. Also if we want
something like that, I'd rather not want to adapt all bindings, but
would like to see this being generic enough to be described in a single
catch-all binding.

I also wonder if it would be nicer to abstract that as something like:

	/ {
		fuse-info {
			compatible = "otp-fuse-info";

			flexcan {
				devices = <&flexcan1>, <&flexcan2>;
				nvmem-cells = <&flexcan_disabled>;
				nvmem-cell-names = "disabled";
			};

			m7 {
				....
			};
		};
	};

as then the driver evaluating this wouldn't need to iterate over the
whole dtb but just over this node. But I'd still keep this private to
the bootloader and not describe it in the generic binding.

Just my 0.02€
Uwe

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Re: [PATCH 0/4] dt-bindings: imx: add nvmem property

[Ahmad Fatoum]

Hi,

On 24.03.22 12:11, Uwe Kleine-König wrote:
> I'd rather not have that in an official binding as the syntax is
> orthogonal to status = "..." but the semantic isn't. Also if we want
> something like that, I'd rather not want to adapt all bindings, but
> would like to see this being generic enough to be described in a single
> catch-all binding.

Cc += Srini who maintains the NVMEM bindings.

> I also wonder if it would be nicer to abstract that as something like:
> 
> 	/ {
> 		fuse-info {
> 			compatible = "otp-fuse-info";
> 
> 			flexcan {
> 				devices = <&flexcan1>, <&flexcan2>;
> 				nvmem-cells = <&flexcan_disabled>;
> 				nvmem-cell-names = "disabled";
> 			};
> 
> 			m7 {
> 				....
> 			};
> 		};
> 	};
> 
> as then the driver evaluating this wouldn't need to iterate over the
> whole dtb but just over this node. But I'd still keep this private to
> the bootloader and not describe it in the generic binding.

I like this, but being for bootloader consumption only doesn't mean that
this shouldn't be documented upstream. It's fine to have the binding,
even if Linux isn't expected to implement it.

Cheers,
Ahmad

> 
> Just my 0.02€
> Uwe


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RE: [PATCH 0/4] dt-bindings: imx: add nvmem property

[Peng Fan]

> Subject: Re: [PATCH 0/4] dt-bindings: imx: add nvmem property
> 
> Hello,
> 
> On Thu, Mar 24, 2022 at 12:20:20PM +0800, Peng Fan (OSS) wrote:
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > To i.MX SoC, there are many variants, such as i.MX8M Plus which
> > feature 4 A53, GPU, VPU, SDHC, FLEXCAN, FEC, eQOS and etc.
> > But i.MX8M Plus has many parts, one part may not have FLEXCAN, the
> > other part may not have eQOS or GPU.
> > But we use one device tree to support i.MX8MP including its parts,
> > then we need update device tree to mark the disabled IP status "disabled".
> >
> > In NXP U-Boot, we hardcoded node path and runtime update device tree
> > status in U-Boot according to fuse value. But this method is not
> > scalable and need encoding all the node paths that needs check.
> >
> > By introducing nvmem property for each node that needs runtime update
> > status property accoridng fuse value, we could use one Bootloader code
> > piece to support all i.MX SoCs.
> >
> > The drawback is we need nvmem property for all the nodes which maybe
> > fused out.
> 
> I'd rather not have that in an official binding as the syntax is orthogonal to
> status = "..." but the semantic isn't. Also if we want something like that, I'd
> rather not want to adapt all bindings, but would like to see this being generic
> enough to be described in a single catch-all binding.
> 
> I also wonder if it would be nicer to abstract that as something like:
> 
> 	/ {
> 		fuse-info {
> 			compatible = "otp-fuse-info";
> 
> 			flexcan {
> 				devices = <&flexcan1>, <&flexcan2>;
> 				nvmem-cells = <&flexcan_disabled>;
> 				nvmem-cell-names = "disabled";
> 			};
> 
> 			m7 {
> 				....
> 			};
> 		};
> 	};
> 
> as then the driver evaluating this wouldn't need to iterate over the whole dtb
> but just over this node. But I'd still keep this private to the bootloader and not
> describe it in the generic binding.

Good idea. But I still prefer Linux accept this binding and related device tree as
you described above, because U-Boot sync with linux device tree and bindings.

Thanks,
Peng.

> 
> Just my 0.02€
> Uwe

Re: [PATCH 4/4] dt-bindings: net: imx-dwmac: introduce nvmem property

[Rob Herring]

On Thu, 24 Mar 2022 12:20:24 +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> To i.MX8M Family variants, dwmac maybe fused out. Bootloader could use
> this property to read out the fuse value and mark the node status
> at runtime.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 

Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.

Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.

Full log is available here: https://patchwork.ozlabs.org/patch/1608879


ethernet@30bf0000: nvmem-cell-names:0: 'fused' was expected
	arch/arm64/boot/dts/freescale/imx8mp-evk.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dt.yaml

Re: [PATCH 2/4] dt-bindings: net: fsl,fec: introduce nvmem property

[Rob Herring]

On Thu, 24 Mar 2022 12:20:22 +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> To i.MX8M Family variants, fec maybe fused out. Bootloader could use
> this property to read out the fuse value and mark the node status
> at runtime.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  Documentation/devicetree/bindings/net/fsl,fec.yaml | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 

Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.

Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.

Full log is available here: https://patchwork.ozlabs.org/patch/1608877


ethernet@2188000: More than one condition true in oneOf schema:
	arch/arm/boot/dts/imx6dl-mba6a.dt.yaml
	arch/arm/boot/dts/imx6dl-nit6xlite.dt.yaml
	arch/arm/boot/dts/imx6dl-nitrogen6x.dt.yaml
	arch/arm/boot/dts/imx6dl-riotboard.dt.yaml
	arch/arm/boot/dts/imx6dl-sabreauto.dt.yaml
	arch/arm/boot/dts/imx6dl-ts7970.dt.yaml
	arch/arm/boot/dts/imx6q-arm2.dt.yaml
	arch/arm/boot/dts/imx6q-evi.dt.yaml
	arch/arm/boot/dts/imx6q-mba6a.dt.yaml
	arch/arm/boot/dts/imx6q-mccmon6.dt.yaml
	arch/arm/boot/dts/imx6q-nitrogen6_max.dt.yaml
	arch/arm/boot/dts/imx6q-nitrogen6_som2.dt.yaml
	arch/arm/boot/dts/imx6q-nitrogen6x.dt.yaml
	arch/arm/boot/dts/imx6qp-nitrogen6_max.dt.yaml
	arch/arm/boot/dts/imx6qp-nitrogen6_som2.dt.yaml
	arch/arm/boot/dts/imx6qp-sabreauto.dt.yaml
	arch/arm/boot/dts/imx6q-sabreauto.dt.yaml
	arch/arm/boot/dts/imx6q-ts7970.dt.yaml

ethernet@30be0000: nvmem-cell-names:0: 'fused' was expected
	arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx-0x.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mn-beacon-kit.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mn-evk.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mp-evk.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mq-hummingboard-pulse.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mq-librem5-r4.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mq-phanbell.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mq-thor96.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dt.yaml
	arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dt.yaml

ethernet@30be0000: 'phy-connection-type' does not match any of the regexes: 'pinctrl-[0-9]+'
	arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dt.yaml

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	arch/arm64/boot/dts/freescale/imx8qm-mek.dt.yaml
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dt.yaml
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dt.yaml
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dt.yaml

ethernet@5b050000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+'
	arch/arm64/boot/dts/freescale/imx8qm-mek.dt.yaml
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dt.yaml
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dt.yaml
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dt.yaml

Re: [PATCH 0/4] dt-bindings: imx: add nvmem property

[Rob Herring]

On Thu, Mar 24, 2022 at 12:11:04PM +0100, Uwe Kleine-König wrote:
> Hello,
> 
> On Thu, Mar 24, 2022 at 12:20:20PM +0800, Peng Fan (OSS) wrote:
> > From: Peng Fan <peng.fan@nxp.com>
> > 
> > To i.MX SoC, there are many variants, such as i.MX8M Plus which
> > feature 4 A53, GPU, VPU, SDHC, FLEXCAN, FEC, eQOS and etc.
> > But i.MX8M Plus has many parts, one part may not have FLEXCAN,
> > the other part may not have eQOS or GPU.
> > But we use one device tree to support i.MX8MP including its parts,
> > then we need update device tree to mark the disabled IP status "disabled".
> > 
> > In NXP U-Boot, we hardcoded node path and runtime update device tree
> > status in U-Boot according to fuse value. But this method is not
> > scalable and need encoding all the node paths that needs check.
> > 
> > By introducing nvmem property for each node that needs runtime update
> > status property accoridng fuse value, we could use one Bootloader
> > code piece to support all i.MX SoCs.
> > 
> > The drawback is we need nvmem property for all the nodes which maybe
> > fused out.
> 
> I'd rather not have that in an official binding as the syntax is
> orthogonal to status = "..." but the semantic isn't. Also if we want
> something like that, I'd rather not want to adapt all bindings, but
> would like to see this being generic enough to be described in a single
> catch-all binding.
> 
> I also wonder if it would be nicer to abstract that as something like:
> 
> 	/ {
> 		fuse-info {
> 			compatible = "otp-fuse-info";
> 
> 			flexcan {
> 				devices = <&flexcan1>, <&flexcan2>;
> 				nvmem-cells = <&flexcan_disabled>;
> 				nvmem-cell-names = "disabled";
> 			};
> 
> 			m7 {
> 				....
> 			};
> 		};
> 	};
> 
> as then the driver evaluating this wouldn't need to iterate over the
> whole dtb but just over this node. But I'd still keep this private to
> the bootloader and not describe it in the generic binding.

There's been discussions (under the system DT umbrella mostly) about 
bindings for peripheral enable/disable control/status. Most of the time 
it is in context of device assignment to secure/non-secure world or 
partitions in a system (via a partitioning hypervisor).

This feels like the same thing and could use the same binding. But 
someone has to take into account all the uses and come up with 
something. One off solutions are a NAK.

Rob

RE: [PATCH 0/4] dt-bindings: imx: add nvmem property

[Peng Fan]

> Subject: Re: [PATCH 0/4] dt-bindings: imx: add nvmem property
> 
> On Thu, Mar 24, 2022 at 12:11:04PM +0100, Uwe Kleine-König wrote:
> > Hello,
> >
> > On Thu, Mar 24, 2022 at 12:20:20PM +0800, Peng Fan (OSS) wrote:
> > > From: Peng Fan <peng.fan@nxp.com>
> > >
> > > To i.MX SoC, there are many variants, such as i.MX8M Plus which
> > > feature 4 A53, GPU, VPU, SDHC, FLEXCAN, FEC, eQOS and etc.
> > > But i.MX8M Plus has many parts, one part may not have FLEXCAN, the
> > > other part may not have eQOS or GPU.
> > > But we use one device tree to support i.MX8MP including its parts,
> > > then we need update device tree to mark the disabled IP status
> "disabled".
> > >
> > > In NXP U-Boot, we hardcoded node path and runtime update device tree
> > > status in U-Boot according to fuse value. But this method is not
> > > scalable and need encoding all the node paths that needs check.
> > >
> > > By introducing nvmem property for each node that needs runtime
> > > update status property accoridng fuse value, we could use one
> > > Bootloader code piece to support all i.MX SoCs.
> > >
> > > The drawback is we need nvmem property for all the nodes which maybe
> > > fused out.
> >
> > I'd rather not have that in an official binding as the syntax is
> > orthogonal to status = "..." but the semantic isn't. Also if we want
> > something like that, I'd rather not want to adapt all bindings, but
> > would like to see this being generic enough to be described in a
> > single catch-all binding.
> >
> > I also wonder if it would be nicer to abstract that as something like:
> >
> > 	/ {
> > 		fuse-info {
> > 			compatible = "otp-fuse-info";
> >
> > 			flexcan {
> > 				devices = <&flexcan1>, <&flexcan2>;
> > 				nvmem-cells = <&flexcan_disabled>;
> > 				nvmem-cell-names = "disabled";
> > 			};
> >
> > 			m7 {
> > 				....
> > 			};
> > 		};
> > 	};
> >
> > as then the driver evaluating this wouldn't need to iterate over the
> > whole dtb but just over this node. But I'd still keep this private to
> > the bootloader and not describe it in the generic binding.
> 
> There's been discussions (under the system DT umbrella mostly) about
> bindings for peripheral enable/disable control/status. Most of the time it is in
> context of device assignment to secure/non-secure world or partitions in a
> system (via a partitioning hypervisor).
> 
> This feels like the same thing and could use the same binding. But someone
> has to take into account all the uses and come up with something. One off
> solutions are a NAK.

Loop Stefano.

Per my understanding, system device tree is not a runtime generated device
tree, in case I am wrong.

To i.MX, one SoC has many different parts, one kind part may not have
VPU, another part may not have GPU, another part may be a full feature
one. We have a device tree for the full feature one, but we not wanna
introduce other static device tree files for non-full feature parts.

So we let bootloader to runtime setting status of a device node according
to fuse info that read out by bootloader at runtime.

I think my case is different with system device tree, and maybe NXP i.MX
specific. So I would introduce a vendor compatible node, following Uwe's
suggestion. We Just need such binding doc and device node in Linux kernel
tree. The code to scan this node is in U-Boot.

/ {
 		fuse-info {
 			compatible = "fsl,otp-fuse-info";

 			flexcan {
 				devices = <&flexcan1>, <&flexcan2>;
 				nvmem-cells = <&flexcan_disabled>;
 				nvmem-cell-names = "disabled";
 			};

 			m7 {
 				....
 			};
		};
	};

Thanks,
Peng.

> 
> Rob

Re: [PATCH 0/4] dt-bindings: imx: add nvmem property

[Rob Herring]

On Sat, Apr 02, 2022 at 01:52:28AM +0000, Peng Fan wrote:
> > Subject: Re: [PATCH 0/4] dt-bindings: imx: add nvmem property
> > 
> > On Thu, Mar 24, 2022 at 12:11:04PM +0100, Uwe Kleine-König wrote:
> > > Hello,
> > >
> > > On Thu, Mar 24, 2022 at 12:20:20PM +0800, Peng Fan (OSS) wrote:
> > > > From: Peng Fan <peng.fan@nxp.com>
> > > >
> > > > To i.MX SoC, there are many variants, such as i.MX8M Plus which
> > > > feature 4 A53, GPU, VPU, SDHC, FLEXCAN, FEC, eQOS and etc.
> > > > But i.MX8M Plus has many parts, one part may not have FLEXCAN, the
> > > > other part may not have eQOS or GPU.
> > > > But we use one device tree to support i.MX8MP including its parts,
> > > > then we need update device tree to mark the disabled IP status
> > "disabled".
> > > >
> > > > In NXP U-Boot, we hardcoded node path and runtime update device tree
> > > > status in U-Boot according to fuse value. But this method is not
> > > > scalable and need encoding all the node paths that needs check.
> > > >
> > > > By introducing nvmem property for each node that needs runtime
> > > > update status property accoridng fuse value, we could use one
> > > > Bootloader code piece to support all i.MX SoCs.
> > > >
> > > > The drawback is we need nvmem property for all the nodes which maybe
> > > > fused out.
> > >
> > > I'd rather not have that in an official binding as the syntax is
> > > orthogonal to status = "..." but the semantic isn't. Also if we want
> > > something like that, I'd rather not want to adapt all bindings, but
> > > would like to see this being generic enough to be described in a
> > > single catch-all binding.
> > >
> > > I also wonder if it would be nicer to abstract that as something like:
> > >
> > > 	/ {
> > > 		fuse-info {
> > > 			compatible = "otp-fuse-info";
> > >
> > > 			flexcan {
> > > 				devices = <&flexcan1>, <&flexcan2>;
> > > 				nvmem-cells = <&flexcan_disabled>;
> > > 				nvmem-cell-names = "disabled";
> > > 			};
> > >
> > > 			m7 {
> > > 				....
> > > 			};
> > > 		};
> > > 	};
> > >
> > > as then the driver evaluating this wouldn't need to iterate over the
> > > whole dtb but just over this node. But I'd still keep this private to
> > > the bootloader and not describe it in the generic binding.
> > 
> > There's been discussions (under the system DT umbrella mostly) about
> > bindings for peripheral enable/disable control/status. Most of the time it is in
> > context of device assignment to secure/non-secure world or partitions in a
> > system (via a partitioning hypervisor).
> > 
> > This feels like the same thing and could use the same binding. But someone
> > has to take into account all the uses and come up with something. One off
> > solutions are a NAK.
> 
> Loop Stefano.
> 
> Per my understanding, system device tree is not a runtime generated device
> tree, in case I am wrong.

I said it was part of 'system DT' discussions, not that you need 'system 
DT'. There's been binding patches on the list from ST for the 'trustzone 
protection controller' if I remember the name right. I think there was 
another proposal too.


> To i.MX, one SoC has many different parts, one kind part may not have
> VPU, another part may not have GPU, another part may be a full feature
> one. We have a device tree for the full feature one, but we not wanna
> introduce other static device tree files for non-full feature parts.
> 
> So we let bootloader to runtime setting status of a device node according
> to fuse info that read out by bootloader at runtime.

Sounds like the same problem for the OS perspective. A device may or may 
not be available to the OS. The reason being because the device is 
assigned to TZ or another core vs. fused off doesn't matter.


> I think my case is different with system device tree, and maybe NXP i.MX
> specific. So I would introduce a vendor compatible node, following Uwe's
> suggestion. We Just need such binding doc and device node in Linux kernel
> tree. The code to scan this node is in U-Boot.

Again, device assignment is a common problem. I'm only going to accept a 
common solution.

Rob