From: "Allan W . Nielsen" <allan.nielsen@microchip.com>
To: Yangbo Lu <yangbo.lu@nxp.com>
Cc: <netdev@vger.kernel.org>,
"David S . Miller" <davem@davemloft.net>,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
"Microchip Linux Driver Support" <UNGLinuxDriver@microchip.com>
Subject: Re: [v2, 4/4] ocelot: add VCAP IS2 rule to trap PTP Ethernet frames
Date: Tue, 13 Aug 2019 08:25:26 +0200 [thread overview]
Message-ID: <20190813062525.5bgdzjc6kw5hqdxk@lx-anielsen.microsemi.net> (raw)
In-Reply-To: <20190813025214.18601-5-yangbo.lu@nxp.com>
The 08/13/2019 10:52, Yangbo Lu wrote:
> All the PTP messages over Ethernet have etype 0x88f7 on them.
> Use etype as the key to trap PTP messages.
>
> Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> ---
> Changes for v2:
> - Added this patch.
> ---
> drivers/net/ethernet/mscc/ocelot.c | 28 ++++++++++++++++++++++++++++
> 1 file changed, 28 insertions(+)
>
> diff --git a/drivers/net/ethernet/mscc/ocelot.c b/drivers/net/ethernet/mscc/ocelot.c
> index 6932e61..40f4e0d 100644
> --- a/drivers/net/ethernet/mscc/ocelot.c
> +++ b/drivers/net/ethernet/mscc/ocelot.c
> @@ -1681,6 +1681,33 @@ int ocelot_probe_port(struct ocelot *ocelot, u8 port,
> }
> EXPORT_SYMBOL(ocelot_probe_port);
>
> +static int ocelot_ace_add_ptp_rule(struct ocelot *ocelot)
> +{
> + struct ocelot_ace_rule *rule;
> +
> + rule = kzalloc(sizeof(*rule), GFP_KERNEL);
> + if (!rule)
> + return -ENOMEM;
> +
> + /* Entry for PTP over Ethernet (etype 0x88f7)
> + * Action: trap to CPU port
> + */
> + rule->ocelot = ocelot;
> + rule->prio = 1;
> + rule->type = OCELOT_ACE_TYPE_ETYPE;
> + /* Available on all ingress port except CPU port */
> + rule->ingress_port = ~BIT(ocelot->num_phys_ports);
> + rule->dmac_mc = OCELOT_VCAP_BIT_1;
> + rule->frame.etype.etype.value[0] = 0x88;
> + rule->frame.etype.etype.value[1] = 0xf7;
> + rule->frame.etype.etype.mask[0] = 0xff;
> + rule->frame.etype.etype.mask[1] = 0xff;
> + rule->action = OCELOT_ACL_ACTION_TRAP;
> +
> + ocelot_ace_rule_offload_add(rule);
> + return 0;
> +}
> +
> int ocelot_init(struct ocelot *ocelot)
> {
> u32 port;
> @@ -1708,6 +1735,7 @@ int ocelot_init(struct ocelot *ocelot)
> ocelot_mact_init(ocelot);
> ocelot_vlan_init(ocelot);
> ocelot_ace_init(ocelot);
> + ocelot_ace_add_ptp_rule(ocelot);
>
> for (port = 0; port < ocelot->num_phys_ports; port++) {
> /* Clear all counters (5 groups) */
This seems really wrong to me, and much too hard-coded...
What if I want to forward the PTP frames to be forwarded like a normal non-aware
PTP switch?
What if do not want this on all ports?
If you do not have an application behind this implementing a boundary or
transparent clock, then you are breaking PTP on the network.
/Allan
next prev parent reply other threads:[~2019-08-13 6:25 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-13 2:52 [v2, 0/4] ocelot: support PTP Ethernet frames trapping Yangbo Lu
2019-08-13 2:52 ` [v2, 1/4] ocelot_ace: drop member port from ocelot_ace_rule structure Yangbo Lu
2019-08-13 2:52 ` [v2, 2/4] ocelot_ace: fix ingress ports setting for rule Yangbo Lu
2019-08-13 2:52 ` [v2, 3/4] ocelot_ace: fix action of trap Yangbo Lu
2019-08-13 6:16 ` Allan W . Nielsen
2019-08-13 6:30 ` Allan W . Nielsen
2019-08-14 4:35 ` Y.b. Lu
2019-08-20 4:23 ` Y.b. Lu
2019-08-13 2:52 ` [v2, 4/4] ocelot: add VCAP IS2 rule to trap PTP Ethernet frames Yangbo Lu
2019-08-13 6:25 ` Allan W . Nielsen [this message]
2019-08-14 4:56 ` Y.b. Lu
2019-08-14 9:16 ` Allan W . Nielsen
2019-08-15 12:08 ` Y.b. Lu
2019-08-15 12:45 ` Andrew Lunn
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