From: Joakim Zhang <qiangqing.zhang@nxp.com>
To: "mkl@pengutronix.de" <mkl@pengutronix.de>,
"linux-can@vger.kernel.org" <linux-can@vger.kernel.org>
Cc: "wg@grandegger.com" <wg@grandegger.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"stefan@agner.ch" <stefan@agner.ch>,
dl-linux-imx <linux-imx@nxp.com>,
Joakim Zhang <qiangqing.zhang@nxp.com>
Subject: [PATCH] can: flexcan: disable completely the ECC mechanism
Date: Thu, 15 Aug 2019 08:00:26 +0000 [thread overview]
Message-ID: <20190815075806.23212-1-qiangqing.zhang@nxp.com> (raw)
The ECC(memory error detection and correction) mechanism can be
activated or not, controlled by the ECCDIS bit in CAN_MECR. When
disabled, updates on indications and reporting registers are stopped.
So if want to disable ECC completely, had better assert ECCDIS bit,
not just mask the related interrupts.
Fixes:cdce844865be("can: flexcan: add vf610 support for FlexCAN")
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
---
drivers/net/can/flexcan.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index def8cbbc04e8..6a48333b40c7 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -1428,6 +1428,7 @@ static int flexcan_chip_start(struct net_device *dev)
reg_mecr = priv->read(®s->mecr);
reg_mecr &= ~FLEXCAN_MECR_ECRWRDIS;
priv->write(reg_mecr, ®s->mecr);
+ reg_mecr |= FLEXCAN_MECR_ECCDIS;
reg_mecr &= ~(FLEXCAN_MECR_NCEFAFRZ | FLEXCAN_MECR_HANCEI_MSK |
FLEXCAN_MECR_FANCEI_MSK);
priv->write(reg_mecr, ®s->mecr);
--
2.17.1
next reply other threads:[~2019-08-15 8:00 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-15 8:00 Joakim Zhang [this message]
2019-08-16 6:37 ` [PATCH] can: flexcan: disable completely the ECC mechanism Marc Kleine-Budde
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