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From: Andrew Lunn <andrew@lunn.ch>
To: Oleksij Rempel <o.rempel@pengutronix.de>
Cc: Chris Snook <chris.snook@gmail.com>,
	Florian Fainelli <f.fainelli@gmail.com>,
	James Hogan <jhogan@kernel.org>, Jay Cliburn <jcliburn@gmail.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Paul Burton <paul.burton@mips.com>,
	Ralf Baechle <ralf@linux-mips.org>,
	Rob Herring <robh+dt@kernel.org>,
	Russell King <linux@armlinux.org.uk>,
	Vivien Didelot <vivien.didelot@gmail.com>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	"David S. Miller" <davem@davemloft.net>,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, linux-mips@vger.kernel.org
Subject: Re: [PATCH v1 1/4] net: ag71xx: port to phylink
Date: Wed, 16 Oct 2019 14:12:16 +0200	[thread overview]
Message-ID: <20191016121216.GD4780@lunn.ch> (raw)
In-Reply-To: <20191014061549.3669-2-o.rempel@pengutronix.de>

On Mon, Oct 14, 2019 at 08:15:46AM +0200, Oleksij Rempel wrote:
> The port to phylink was done as close as possible to initial
> functionality.
> Theoretically this HW can support flow control, practically seems to be not
> enough to just enable it. So, more work should be done.
> 
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>

Hi Oleksij

Please include Russell King in Cc: in future.

> -static void ag71xx_phy_link_adjust(struct net_device *ndev)
> +static void ag71xx_mac_validate(struct phylink_config *config,
> +			    unsigned long *supported,
> +			    struct phylink_link_state *state)
>  {
> -	struct ag71xx *ag = netdev_priv(ndev);
> +	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
> +
> +	if (state->interface != PHY_INTERFACE_MODE_NA &&
> +	    state->interface != PHY_INTERFACE_MODE_GMII &&
> +	    state->interface != PHY_INTERFACE_MODE_MII) {
> +		bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
> +		return;
> +	}
> +
> +	phylink_set(mask, MII);
> +
> +	/* flow control is not supported */
>  
> -	ag71xx_link_adjust(ag, true);
> +	phylink_set(mask, 10baseT_Half);
> +	phylink_set(mask, 10baseT_Full);
> +	phylink_set(mask, 100baseT_Half);
> +	phylink_set(mask, 100baseT_Full);
> +
> +	phylink_set(mask, 1000baseT_Full);
> +	phylink_set(mask, 1000baseX_Full);

Can the MAC/PHY dynamically switch between MII and GMII? Maybe you
should only add 1G support when interface is GMII?

> @@ -1239,6 +1255,13 @@ static int ag71xx_open(struct net_device *ndev)
>  	unsigned int max_frame_len;
>  	int ret;
>  
> +	ret = phylink_of_phy_connect(ag->phylink, ag->pdev->dev.of_node, 0);
> +	if (ret) {
> +		netif_info(ag, link, ndev, "phylink_of_phy_connect filed with err: %i\n",
> +			   ret);

netif_info seems wrong. _err()?

	   Andrew


  reply	other threads:[~2019-10-16 12:12 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-14  6:15 [PATCH v1 0/4] add dsa switch support for ar9331 Oleksij Rempel
2019-10-14  6:15 ` [PATCH v1 1/4] net: ag71xx: port to phylink Oleksij Rempel
2019-10-16 12:12   ` Andrew Lunn [this message]
2019-10-16 12:24     ` Oleksij Rempel
2019-10-16 13:32       ` Andrew Lunn
2019-10-16 17:45         ` David Miller
2019-10-14  6:15 ` [PATCH v1 2/4] dt-bindings: net: dsa: qca,ar9331 switch documentation Oleksij Rempel
2019-10-16 12:21   ` Andrew Lunn
2019-10-16 12:40     ` Oleksij Rempel
2019-10-16 20:23   ` Andrew Lunn
2019-10-17  6:42     ` Oleksij Rempel
2019-10-14  6:15 ` [PATCH v1 3/4] MIPS: ath79: ar9331: add ar9331-switch node Oleksij Rempel
2019-10-14  6:15 ` [PATCH v1 4/4] net: dsa: add support for Atheros AR9331 build-in switch Oleksij Rempel
2019-10-16 13:00   ` Andrew Lunn
2019-10-16 14:07     ` Oleksij Rempel
2019-10-16 16:20     ` Fabio Estevam
2019-10-17 18:35   ` Florian Fainelli
2019-10-18  4:52     ` Oleksij Rempel

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