[PATCH V4 net-next 0/4] net: ethernet: stmmac: cleanup clock and optimization

[PATCH V4 net-next 0/4] net: ethernet: stmmac: cleanup clock and optimization

[Christophe Roullier]

Some improvements: 
 - manage syscfg as optional clock, 
 - update slew rate of ETH_MDIO pin, 
 - Enable gating of the MAC TX clock during TX low-power mode

V4: Update with Andrew Lunn remark

Christophe Roullier (4):
  net: ethernet: stmmac: Add support for syscfg clock
  ARM: dts: stm32: remove syscfg clock on stm32mp157c ethernet
  ARM: dts: stm32: adjust slew rate for Ethernet
  ARM: dts: stm32: Enable gating of the MAC TX clock during TX low-power
    mode on stm32mp157c

 arch/arm/boot/dts/stm32mp157-pinctrl.dtsi     |  9 ++++++--
 arch/arm/boot/dts/stm32mp157c.dtsi            |  7 +++---
 .../net/ethernet/stmicro/stmmac/dwmac-stm32.c | 23 +++++++------------
 3 files changed, 18 insertions(+), 21 deletions(-)

-- 
2.17.1

[PATCH V4 net-next 1/4] net: ethernet: stmmac: Add support for syscfg clock

[Christophe Roullier]

Add optional support for syscfg clock in dwmac-stm32.c
Now Syscfg clock is activated automatically when syscfg
registers are used

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
---
 .../net/ethernet/stmicro/stmmac/dwmac-stm32.c | 23 +++++++------------
 1 file changed, 8 insertions(+), 15 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
index 4ef041bdf6a1..9e4180e1683f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
@@ -155,18 +155,14 @@ static int stm32mp1_clk_prepare(struct stm32_dwmac *dwmac, bool prepare)
 		ret = clk_prepare_enable(dwmac->syscfg_clk);
 		if (ret)
 			return ret;
-
-		if (dwmac->clk_eth_ck) {
-			ret = clk_prepare_enable(dwmac->clk_eth_ck);
-			if (ret) {
-				clk_disable_unprepare(dwmac->syscfg_clk);
+		ret = clk_prepare_enable(dwmac->clk_eth_ck);
+		if (ret) {
+			clk_disable_unprepare(dwmac->syscfg_clk);
 				return ret;
-			}
 		}
 	} else {
 		clk_disable_unprepare(dwmac->syscfg_clk);
-		if (dwmac->clk_eth_ck)
-			clk_disable_unprepare(dwmac->clk_eth_ck);
+		clk_disable_unprepare(dwmac->clk_eth_ck);
 	}
 	return ret;
 }
@@ -320,12 +316,10 @@ static int stm32mp1_parse_data(struct stm32_dwmac *dwmac,
 		return PTR_ERR(dwmac->clk_ethstp);
 	}
 
-	/*  Clock for sysconfig */
+	/*  Optional Clock for sysconfig */
 	dwmac->syscfg_clk = devm_clk_get(dev, "syscfg-clk");
-	if (IS_ERR(dwmac->syscfg_clk)) {
-		dev_err(dev, "No syscfg clock provided...\n");
-		return PTR_ERR(dwmac->syscfg_clk);
-	}
+	if (IS_ERR(dwmac->syscfg_clk))
+		dwmac->syscfg_clk = NULL;
 
 	/* Get IRQ information early to have an ability to ask for deferred
 	 * probe if needed before we went too far with resource allocation.
@@ -437,8 +431,7 @@ static int stm32mp1_suspend(struct stm32_dwmac *dwmac)
 
 	clk_disable_unprepare(dwmac->clk_tx);
 	clk_disable_unprepare(dwmac->syscfg_clk);
-	if (dwmac->clk_eth_ck)
-		clk_disable_unprepare(dwmac->clk_eth_ck);
+	clk_disable_unprepare(dwmac->clk_eth_ck);
 
 	return ret;
 }
-- 
2.17.1

[PATCH V4 net-next 2/4] ARM: dts: stm32: remove syscfg clock on stm32mp157c ethernet

[Christophe Roullier]

Syscfg is now activated automatically when syscfg registers are used

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
---
 arch/arm/boot/dts/stm32mp157c.dtsi | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
index 9b11654a0a39..f13c2348d130 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -1326,13 +1326,11 @@
 			clock-names = "stmmaceth",
 				      "mac-clk-tx",
 				      "mac-clk-rx",
-				      "ethstp",
-				      "syscfg-clk";
+				      "ethstp";
 			clocks = <&rcc ETHMAC>,
 				 <&rcc ETHTX>,
 				 <&rcc ETHRX>,
-				 <&rcc ETHSTP>,
-				 <&rcc SYSCFG>;
+				 <&rcc ETHSTP>;
 			st,syscon = <&syscfg 0x4>;
 			snps,mixed-burst;
 			snps,pbl = <2>;
-- 
2.17.1

[PATCH V4 net-next 3/4] ARM: dts: stm32: adjust slew rate for Ethernet

[Christophe Roullier]

ETH_MDIO slew-rate should be set to "0" instead of "2"

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
---
 arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
index 0a3a7d66737b..9a8f0d4c9ea3 100644
--- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
@@ -217,13 +217,18 @@
 						 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
 						 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
 						 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
-						 <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
 						 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
 					bias-disable;
 					drive-push-pull;
-					slew-rate = <3>;
+					slew-rate = <2>;
 				};
 				pins2 {
+					pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
+					bias-disable;
+					drive-push-pull;
+					slew-rate = <0>;
+				};
+				pins3 {
 					pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
 						 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
 						 <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
-- 
2.17.1

[PATCH V4 net-next 4/4] ARM: dts: stm32: Enable gating of the MAC TX clock during TX low-power mode on stm32mp157c

[Christophe Roullier]

When there is no activity on ethernet phy link, the ETH_GTX_CLK is cut

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
---
 arch/arm/boot/dts/stm32mp157c.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
index f13c2348d130..8df2986dd452 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -1334,6 +1334,7 @@
 			st,syscon = <&syscfg 0x4>;
 			snps,mixed-burst;
 			snps,pbl = <2>;
+			snps,en-tx-lpi-clockgating;
 			snps,axi-config = <&stmmac_axi_config_0>;
 			snps,tso;
 			status = "disabled";
-- 
2.17.1

Re: [PATCH V4 net-next 1/4] net: ethernet: stmmac: Add support for syscfg clock

[Andrew Lunn]

On Thu, Nov 07, 2019 at 09:47:54AM +0100, Christophe Roullier wrote:
> Add optional support for syscfg clock in dwmac-stm32.c
> Now Syscfg clock is activated automatically when syscfg
> registers are used
> 
> Signed-off-by: Christophe Roullier <christophe.roullier@st.com>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

Re: [PATCH V4 net-next 0/4] net: ethernet: stmmac: cleanup clock and optimization

[David Miller]

From: Christophe Roullier <christophe.roullier@st.com>
Date: Thu, 7 Nov 2019 09:47:53 +0100

> Some improvements: 
>  - manage syscfg as optional clock, 
>  - update slew rate of ETH_MDIO pin, 
>  - Enable gating of the MAC TX clock during TX low-power mode
> 
> V4: Update with Andrew Lunn remark

This is mostly ARM DT updates, which tree should this go through?

I don't want to step on toes this time :-)

Re: [PATCH V4 net-next 0/4] net: ethernet: stmmac: cleanup clock and optimization

[Alexandre Torgue]

Hi David

On 11/8/19 12:26 AM, David Miller wrote:
> From: Christophe Roullier <christophe.roullier@st.com>
> Date: Thu, 7 Nov 2019 09:47:53 +0100
> 
>> Some improvements:
>>   - manage syscfg as optional clock,
>>   - update slew rate of ETH_MDIO pin,
>>   - Enable gating of the MAC TX clock during TX low-power mode
>>
>> V4: Update with Andrew Lunn remark
> 
> This is mostly ARM DT updates, which tree should this go through?
> 
> I don't want to step on toes this time :-)
> 

I'll take DT patches in my STM32 tree.

Thanks
Alex

Re: [PATCH V4 net-next 1/4] net: ethernet: stmmac: Add support for syscfg clock

[David Miller]

From: Christophe Roullier <christophe.roullier@st.com>
Date: Thu, 7 Nov 2019 09:47:54 +0100

> Add optional support for syscfg clock in dwmac-stm32.c
> Now Syscfg clock is activated automatically when syscfg
> registers are used
> 
> Signed-off-by: Christophe Roullier <christophe.roullier@st.com>

Applied to net-next, thanks.

Re: [PATCH V4 net-next 0/4] net: ethernet: stmmac: cleanup clock and optimization

[David Miller]

From: Alexandre Torgue <alexandre.torgue@st.com>
Date: Fri, 8 Nov 2019 11:35:23 +0100

> Hi David
> 
> On 11/8/19 12:26 AM, David Miller wrote:
>> From: Christophe Roullier <christophe.roullier@st.com>
>> Date: Thu, 7 Nov 2019 09:47:53 +0100
>> 
>>> Some improvements:
>>>   - manage syscfg as optional clock,
>>>   - update slew rate of ETH_MDIO pin,
>>>   - Enable gating of the MAC TX clock during TX low-power mode
>>>
>>> V4: Update with Andrew Lunn remark
>> This is mostly ARM DT updates, which tree should this go through?
>> I don't want to step on toes this time :-)
>> 
> 
> I'll take DT patches in my STM32 tree.

Ok, I took patch #1 into net-next.

Re: [PATCH V4 net-next 0/4] net: ethernet: stmmac: cleanup clock and optimization

[Alexandre Torgue]

Hi Christophe

On 11/7/19 9:47 AM, Christophe Roullier wrote:
> Some improvements:
>   - manage syscfg as optional clock,
>   - update slew rate of ETH_MDIO pin,
>   - Enable gating of the MAC TX clock during TX low-power mode
> 
> V4: Update with Andrew Lunn remark
> 
> Christophe Roullier (4):
>    net: ethernet: stmmac: Add support for syscfg clock
>    ARM: dts: stm32: remove syscfg clock on stm32mp157c ethernet
>    ARM: dts: stm32: adjust slew rate for Ethernet
>    ARM: dts: stm32: Enable gating of the MAC TX clock during TX low-power
>      mode on stm32mp157c
> 
>   arch/arm/boot/dts/stm32mp157-pinctrl.dtsi     |  9 ++++++--
>   arch/arm/boot/dts/stm32mp157c.dtsi            |  7 +++---
>   .../net/ethernet/stmicro/stmmac/dwmac-stm32.c | 23 +++++++------------
>   3 files changed, 18 insertions(+), 21 deletions(-)
> 

For DT patches:

Applied on stm32-next.

Thanks.
Alex