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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id k17sm4031953otl.45.2020.01.21.13.51.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jan 2020 13:51:10 -0800 (PST) Received: (nullmailer pid 509 invoked by uid 1000); Tue, 21 Jan 2020 21:51:09 -0000 Date: Tue, 21 Jan 2020 15:51:09 -0600 From: Rob Herring To: Andre Przywara Cc: "David S . Miller" , Radhey Shyam Pandey , Michal Simek , Robert Hancock , netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Mark Rutland , devicetree@vger.kernel.org Subject: Re: [PATCH 14/14] net: axienet: Update devicetree binding documentation Message-ID: <20200121215109.GA26808@bogus> References: <20200110115415.75683-1-andre.przywara@arm.com> <20200110115415.75683-15-andre.przywara@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200110115415.75683-15-andre.przywara@arm.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Fri, Jan 10, 2020 at 11:54:15AM +0000, Andre Przywara wrote: > This adds documentation about the newly introduced, optional > "xlnx,addrwidth" property to the binding documentation. > > While at it, clarify the wording on some properties, replace obsolete > .txt file references with their new .yaml counterparts, and add a more > modern example, using the axistream-connected property. > > Cc: Rob Herring > Cc: Mark Rutland > Cc: devicetree@vger.kernel.org > Signed-off-by: Andre Przywara > --- > .../bindings/net/xilinx_axienet.txt | 57 ++++++++++++++++--- > 1 file changed, 50 insertions(+), 7 deletions(-) > > diff --git a/Documentation/devicetree/bindings/net/xilinx_axienet.txt b/Documentation/devicetree/bindings/net/xilinx_axienet.txt > index 7360617cdedb..78c278c5200f 100644 > --- a/Documentation/devicetree/bindings/net/xilinx_axienet.txt > +++ b/Documentation/devicetree/bindings/net/xilinx_axienet.txt > @@ -12,7 +12,8 @@ sent and received through means of an AXI DMA controller. This driver > includes the DMA driver code, so this driver is incompatible with AXI DMA > driver. > > -For more details about mdio please refer phy.txt file in the same directory. > +For more details about mdio please refer to the ethernet-phy.yaml file in > +the same directory. > > Required properties: > - compatible : Must be one of "xlnx,axi-ethernet-1.00.a", > @@ -27,14 +28,14 @@ Required properties: > instead, and only the Ethernet core interrupt is optionally > specified here. > - phy-handle : Should point to the external phy device. > - See ethernet.txt file in the same directory. > -- xlnx,rxmem : Set to allocated memory buffer for Rx/Tx in the hardware > + See the ethernet-controller.yaml file in the same directory. > +- xlnx,rxmem : Size of the RXMEM buffer in the hardware, in bytes. > > Optional properties: > -- phy-mode : See ethernet.txt > +- phy-mode : See ethernet-controller.yaml. > - xlnx,phy-type : Deprecated, do not use, but still accepted in preference > to phy-mode. > -- xlnx,txcsum : 0 or empty for disabling TX checksum offload, > +- xlnx,txcsum : 0 for disabling TX checksum offload (default if omitted), > 1 to enable partial TX checksum offload, > 2 to enable full TX checksum offload > - xlnx,rxcsum : Same values as xlnx,txcsum but for RX checksum offload > @@ -48,10 +49,20 @@ Optional properties: > If this is specified, the DMA-related resources from that > device (DMA registers and DMA TX/RX interrupts) rather > than this one will be used. > - - mdio : Child node for MDIO bus. Must be defined if PHY access is > +- mdio : Child node for MDIO bus. Must be defined if PHY access is > required through the core's MDIO interface (i.e. always, > unless the PHY is accessed through a different bus). > > +Required properties for axistream-connected subnode: > +- reg : Address and length of the AXI DMA controller MMIO space. > +- interrupts : A list of 2 interrupts: TX DMA and RX DMA, in that order. > + > +Optional properties for axistream-connected subnode: > +- xlnx,addrwidth: Specifies the configured address width of the DMA. Newer > + versions of the IP allow setting this to a value between > + 32 and 64. Defaults to 32 bits if not specified. I think this should be expressed using dma-ranges. This is exactly the purpose of dma-ranges and we shouldn't need a device specific property for this sort of thing. Rob