From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D56B6C2BA83 for ; Fri, 7 Feb 2020 19:49:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B3663217BA for ; Fri, 7 Feb 2020 19:49:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727075AbgBGTty (ORCPT ); Fri, 7 Feb 2020 14:49:54 -0500 Received: from mga02.intel.com ([134.134.136.20]:38023 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726900AbgBGTty (ORCPT ); Fri, 7 Feb 2020 14:49:54 -0500 X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 Feb 2020 11:49:53 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,414,1574150400"; d="scan'208";a="255511597" Received: from smile.fi.intel.com (HELO smile) ([10.237.68.40]) by fmsmga004.fm.intel.com with ESMTP; 07 Feb 2020 11:49:50 -0800 Received: from andy by smile with local (Exim 4.93) (envelope-from ) id 1j09dP-0003vS-8y; Fri, 07 Feb 2020 21:49:51 +0200 Date: Fri, 7 Feb 2020 21:49:51 +0200 From: Andy Shevchenko To: Andrew Lunn Cc: Linus Walleij , christopher.s.hall@intel.com, Mika Westerberg , netdev , "linux-kernel@vger.kernel.org" , Thomas Gleixner , "H. Peter Anvin" , Ingo Molnar , "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , jacob.e.keller@intel.com, Richard Cochran , "David S. Miller" , sean.v.kelley@intel.com Subject: Re: [Intel PMC TGPIO Driver 5/5] drivers/ptp: Add PMC Time-Aware GPIO Driver Message-ID: <20200207194951.GM10400@smile.fi.intel.com> References: <20191211214852.26317-1-christopher.s.hall@intel.com> <20191211214852.26317-6-christopher.s.hall@intel.com> <20200207172844.GC19213@lunn.ch> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200207172844.GC19213@lunn.ch> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Fri, Feb 07, 2020 at 06:28:44PM +0100, Andrew Lunn wrote: > On Fri, Feb 07, 2020 at 06:10:46PM +0100, Linus Walleij wrote: > > OK this looks like some GPIO registers... > > > > Then there is a bunch of PTP stuff I don't understand I suppose > > related to the precision time protocol. > > Hi Linus > > I understand your confusion. The first time this was posted to netdev, > i asked it to be renamed because it has very little to do with GPIO > > https://lore.kernel.org/netdev/20190719132021.GC24930@lunn.ch/ And besides that I didn't see it in internal review list, so, it needs to be very carefully reviewed. I already saw some not good formatted and questionable code. -- With Best Regards, Andy Shevchenko