From: Alex Elder <elder@linaro.org>
To: davem@davemloft.net, kuba@kernel.org
Cc: evgreen@chromium.org, subashab@codeaurora.org,
cpratapa@codeaurora.org, bjorn.andersson@linaro.org,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH net-next 1/5] net: ipa: head-of-line block registers are RX only
Date: Mon, 29 Jun 2020 16:49:15 -0500 [thread overview]
Message-ID: <20200629214919.1196017-2-elder@linaro.org> (raw)
In-Reply-To: <20200629214919.1196017-1-elder@linaro.org>
The INIT_HOL_BLOCK_EN and INIT_HOL_BLOCK_TIMER endpoint registers
are only valid for RX endpoints.
Have ipa_endpoint_modem_hol_block_clear_all() skip writing these
registers for TX endpoints.
Signed-off-by: Alex Elder <elder@linaro.org>
---
drivers/net/ipa/ipa_endpoint.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ipa/ipa_endpoint.c b/drivers/net/ipa/ipa_endpoint.c
index 9f50d0d11704..3f5a41fc1997 100644
--- a/drivers/net/ipa/ipa_endpoint.c
+++ b/drivers/net/ipa/ipa_endpoint.c
@@ -642,6 +642,8 @@ static int ipa_endpoint_init_hol_block_timer(struct ipa_endpoint *endpoint,
u32 offset;
u32 val;
+ /* assert(!endpoint->toward_ipa); */
+
/* XXX We'll fix this when the register definition is clear */
if (microseconds) {
struct device *dev = &ipa->pdev->dev;
@@ -671,6 +673,8 @@ ipa_endpoint_init_hol_block_enable(struct ipa_endpoint *endpoint, bool enable)
u32 offset;
u32 val;
+ /* assert(!endpoint->toward_ipa); */
+
val = u32_encode_bits(enable ? 1 : 0, HOL_BLOCK_EN_FMASK);
offset = IPA_REG_ENDP_INIT_HOL_BLOCK_EN_N_OFFSET(endpoint_id);
iowrite32(val, endpoint->ipa->reg_virt + offset);
@@ -683,7 +687,7 @@ void ipa_endpoint_modem_hol_block_clear_all(struct ipa *ipa)
for (i = 0; i < IPA_ENDPOINT_MAX; i++) {
struct ipa_endpoint *endpoint = &ipa->endpoint[i];
- if (endpoint->ee_id != GSI_EE_MODEM)
+ if (endpoint->toward_ipa || endpoint->ee_id != GSI_EE_MODEM)
continue;
(void)ipa_endpoint_init_hol_block_timer(endpoint, 0);
--
2.25.1
next prev parent reply other threads:[~2020-06-29 21:49 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-29 21:49 [PATCH net-next 0/5] net: ipa: endpoint configuration updates Alex Elder
2020-06-29 21:49 ` Alex Elder [this message]
2020-06-30 0:35 ` [PATCH net-next 1/5] net: ipa: head-of-line block registers are RX only Jakub Kicinski
2020-06-30 1:01 ` Alex Elder
2020-06-30 1:03 ` David Miller
2020-06-30 1:09 ` Alex Elder
2020-06-30 19:21 ` David Miller
2020-06-30 22:41 ` Alex Elder
2020-06-30 22:49 ` David Miller
2020-06-29 21:49 ` [PATCH net-next 2/5] net: ipa: metadata_mask register is " Alex Elder
2020-06-29 21:49 ` [PATCH net-next 3/5] net: ipa: mode register is TX only Alex Elder
2020-06-29 21:49 ` [PATCH net-next 4/5] net: ipa: clarify endpoint register macro constraints Alex Elder
2020-06-29 21:49 ` [PATCH net-next 5/5] net: ipa: HOL_BLOCK_EN_FMASK is a 1-bit mask Alex Elder
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