From: Helmut Grohne <email@example.com> To: Andrew Lunn <firstname.lastname@example.org> Cc: Nicolas Ferre <email@example.com>, Alexandre Belloni <firstname.lastname@example.org>, Ludovic Desroches <email@example.com>, Woojung Huh <firstname.lastname@example.org>, Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>, Vivien Didelot <email@example.com>, Florian Fainelli <firstname.lastname@example.org>, "David S. Miller" <email@example.com>, Jakub Kicinski <firstname.lastname@example.org>, "Rob Herring" <email@example.com>, "firstname.lastname@example.org" <email@example.com>, "firstname.lastname@example.org" <email@example.com> Subject: Re: [PATCH] net: dsa: microchip: look for phy-mode in port nodes Date: Thu, 16 Jul 2020 09:00:00 +0200 [thread overview] Message-ID: <20200716070000.GA27587@laureti-dev> (raw) In-Reply-To: <20200715130046.GB1211629@lunn.ch> On Wed, Jul 15, 2020 at 03:00:46PM +0200, Andrew Lunn wrote: > On Wed, Jul 15, 2020 at 09:31:12AM +0200, Helmut Grohne wrote: > > You seem to be in favour of more deeply encoding the "there can be only > > one CPU port" assumption. Based on that assumption, the rest of what you > > write makes very much sense to me. Is that the direction to go? > > From what i understand, there is only one port which can do RGMII. It This is not universally true. It does hold for a number of smaller chips including KSZ9893, but it does not hold for e.g. KSZ9897R as explained in my previous mail on this matter. I think that this is the sole point of disagreement here. If we assume that there only ever is one CPU (or user) port, then I agree with the rest of what you wrote. However, my understanding is that this premise is violated by larger devices that are partially supported by this driver. > does not really matter if that is the CPU port, or a user > port. Ideally, whatever port it is, should have the phy-mode property > in its port node. > > How you store that information until you need it is up to the > driver. But KISS is generally best, reuse what you have, unless there > is a good reason to change it. If you see this code being reused when > more than one port supports RGMII, then adding a per port members > makes sense. But if that is unlikely, keep with the global. I've prepared a patch based one the one-CPU-port assumption. It really becomes way simpler that way. I'd like to give it a little more testing before sending it. Given the point of discussion I think that the assumption is a reasonable trade-off, because you can support larger devices with multiple RGMII-capable ports with this driver as long as you only use one of them as CPU port. If someone ever wants to use multiple CPU ports (not me), more significant changes are needed anyway. Partially supporting this runs afoul KISS as you say. Helmut
next prev parent reply other threads:[~2020-07-16 7:00 UTC|newest] Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-06-17 8:22 net/dsa/microchip: correct placement of dt property phy-mode? Helmut Grohne 2020-06-17 21:18 ` Andrew Lunn 2020-07-14 12:08 ` [PATCH] net: dsa: microchip: look for phy-mode in port nodes Helmut Grohne 2020-07-14 22:27 ` Andrew Lunn 2020-07-15 7:31 ` Helmut Grohne 2020-07-15 13:00 ` Andrew Lunn 2020-07-16 7:00 ` Helmut Grohne [this message] 2020-07-16 10:07 ` Helmut Grohne 2020-08-20 6:03 ` [RESEND PATCH] " Helmut Grohne 2020-08-24 22:37 ` David Miller 2020-09-04 8:14 ` [PATCH v2] " Helmut Grohne 2020-09-04 12:59 ` Alexandre Belloni 2020-09-04 13:52 ` Andrew Lunn 2020-09-07 6:15 ` Helmut Grohne 2020-09-07 12:55 ` Andrew Lunn 2020-09-08 8:01 ` [PATCH v3] " Helmut Grohne 2020-09-10 19:32 ` David Miller 2020-09-24 8:37 ` [PATCH] net: dsa: microchip: really " Helmut Grohne 2020-09-25 3:10 ` David Miller
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