From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47869C4741F for ; Fri, 25 Sep 2020 22:14:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 03308207C4 for ; Fri, 25 Sep 2020 22:14:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727520AbgIYWOL (ORCPT ); Fri, 25 Sep 2020 18:14:11 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:56110 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726687AbgIYWOK (ORCPT ); Fri, 25 Sep 2020 18:14:10 -0400 Received: from andrew by vps0.lunn.ch with local (Exim 4.94) (envelope-from ) id 1kLvyd-00GDLd-Vn; Sat, 26 Sep 2020 00:14:03 +0200 Date: Sat, 26 Sep 2020 00:14:03 +0200 From: Andrew Lunn To: Martin Blumenstingl Cc: netdev@vger.kernel.org, linux-amlogic@lists.infradead.org, alexandre.torgue@st.com, linux-kernel@vger.kernel.org, linux@armlinux.org.uk, joabreu@synopsys.com, kuba@kernel.org, peppe.cavallaro@st.com, davem@davemloft.net, linux-arm-kernel@lists.infradead.org Subject: Re: RGMII timing calibration (on 12nm Amlogic SoCs) - integration into dwmac-meson8b Message-ID: <20200925221403.GE3856392@lunn.ch> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Fri, Sep 25, 2020 at 11:47:18PM +0200, Martin Blumenstingl wrote: > Hello, > > Amlogic's 12nm SoC generation requires some RGMII timing calibration > within the Ethernet controller glue registers. > This calibration is only needed for the RGMII modes, not for the > (internal) RMII PHY. > With "incorrect" calibration settings Ethernet speeds up to 100Mbit/s > will still work fine, but no data is flowing on 1Gbit/s connections > (similar to when RX or TX delay settings are incorrect). Hi Martin Is this trying to detect the correct RGMII interface mode: PHY_INTERFACE_MODE_RGMII, PHY_INTERFACE_MODE_RGMII_ID, PHY_INTERFACE_MODE_RGMII_RXID, PHY_INTERFACE_MODE_RGMII_TXID, In general, we recommend the MAC does not insert any delay, we leave it up to the PHY. In DT, you then set the correct phy-mode value, which gets passed to the PHY when the MAC calls the connect function. Is there any documentation as to what the calibration values mean? I would just hard code it to whatever means 0uS delay, and be done. The only time the MAC needs to add delays is when the PHY is not capable of doing it, and generally, they all are. Andrew