From: Horatiu Vultur <horatiu.vultur@microchip.com>
To: Vladimir Oltean <olteanv@gmail.com>
Cc: Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>,
"Ralf Baechle" <ralf@linux-mips.org>,
Paul Burton <paul.burton@mips.com>,
"James Hogan" <jhogan@kernel.org>, <linux-mips@vger.kernel.org>,
lkml <linux-kernel@vger.kernel.org>,
netdev <netdev@vger.kernel.org>,
"Allan W. Nielsen" <allan.nielsen@microchip.com>,
Xiaoliang Yang <xiaoliang.yang_1@nxp.com>, <hongbo.wang@nxp.com>
Subject: Re: [PATCH net-next v3 1/2] net: mscc: ocelot: Add support for tcam
Date: Sat, 26 Sep 2020 13:20:02 +0200 [thread overview]
Message-ID: <20200926112002.i6zpwi26ong2hu4q@soft-dev3.localdomain> (raw)
In-Reply-To: <20200924233949.lof7iduyfgjdxajv@skbuf>
The 09/25/2020 02:39, Vladimir Oltean wrote:
>
Hi Vladimir,
> Hi Horatiu,
>
> On Thu, Apr 23, 2020 at 10:29:48AM +0200, Horatiu Vultur wrote:
> > > > +static const struct vcap_props vcap_is2 = {
> > > > + .name = "IS2",
> > > > + .tg_width = 2,
> > > > + .sw_count = 4,
> > > > + .entry_count = VCAP_IS2_CNT,
> > > > + .entry_words = BITS_TO_32BIT(VCAP_IS2_ENTRY_WIDTH),
> > > > + .entry_width = VCAP_IS2_ENTRY_WIDTH,
> > > > + .action_count = (VCAP_IS2_CNT + VCAP_PORT_CNT + 2),
> > > > + .action_words = BITS_TO_32BIT(VCAP_IS2_ACTION_WIDTH),
> > > > + .action_width = (VCAP_IS2_ACTION_WIDTH),
> > > > + .action_type_width = 1,
> > > > + .action_table = {
> > > > + {
> > > > + .width = (IS2_AO_ACL_ID + IS2_AL_ACL_ID),
> > > > + .count = 2
> > > > + },
> > > > + {
> > > > + .width = 6,
> > > > + .count = 4
> > > > + },
> > > > + },
> > > > + .counter_words = BITS_TO_32BIT(4 * ENTRY_WIDTH),
> > > > + .counter_width = ENTRY_WIDTH,
> > > > +};
>
> Coming again to this patch, I'm having a very hard time understanding
> how VCAP_IS2_ENTRY_WIDTH is derived and what it represents, especially
> since the VCAP_CONST_ENTRY_WIDTH register reads something different.
> Could you please explain?
To be honest, I don't remember precisely. I will need to setup a board
and see exactly. But from what I remember:
- according to this[1] in chapter 3.8.6, table 71. It says that the full
entry of IS2 is 384. And this 384 represent a full entry. In this row,
can be also sub entries like: half entry and quater entries. And each
entry has 2 bits that describes the entry type. So if you have 2 bits
for each possible entry then you have 8 bits describing each type. One
observation is even if you have a full entry each pair of 2 bits
describing the type needs to be set that is a full entry. Maybe if you
have a look at Figure 30, it would be a little bit more clear. Even
there is a register called VCAP_TG_DAT that information is storred
internally in the VCAP_ENTRY_DAT.
- so having those in mind, then VCAP_IS2_ENTRY_WIDTH is the full entry
length - 8 bits. 384 - 8 = 376.
- then if I remember correctly then VCAP_CONST_ENTRY_WIDTH should be
384? or 12 if it is counting the words.
Does it make sense or am I completly off?
>
> Thanks,
> -Vladimir
[1] http://ww1.microchip.com/downloads/en/DeviceDoc/VMDS-10491.pdf
--
/Horatiu
next prev parent reply other threads:[~2020-09-26 11:20 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-31 7:16 [PATCH net-next v3 0/2] Add hw offload of TC flower on MSCC Ocelot Horatiu Vultur
2019-05-31 7:16 ` [PATCH net-next v3 1/2] net: mscc: ocelot: Add support for tcam Horatiu Vultur
2020-02-24 10:38 ` Vladimir Oltean
2020-02-24 11:03 ` Horatiu Vultur
2020-02-24 11:32 ` Vladimir Oltean
2020-04-22 21:26 ` Vladimir Oltean
2020-04-23 8:29 ` Horatiu Vultur
2020-04-23 9:18 ` Vladimir Oltean
2020-09-24 23:39 ` Vladimir Oltean
2020-09-26 11:20 ` Horatiu Vultur [this message]
2020-09-26 12:37 ` Vladimir Oltean
2020-09-26 18:55 ` Horatiu Vultur
2020-09-26 19:06 ` Vladimir Oltean
2019-05-31 7:16 ` [PATCH net-next v3 2/2] net: mscc: ocelot: Hardware ofload for tc flower filter Horatiu Vultur
2019-06-02 20:50 ` [PATCH net-next v3 0/2] Add hw offload of TC flower on MSCC Ocelot David Miller
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