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From: Sasha Levin <sashal@kernel.org>
To: linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: Xiaoliang Yang <xiaoliang.yang_1@nxp.com>,
	"David S . Miller" <davem@davemloft.net>,
	Sasha Levin <sashal@kernel.org>,
	netdev@vger.kernel.org
Subject: [PATCH AUTOSEL 4.19 02/12] net: mscc: ocelot: fix fields offset in SG_CONFIG_REG_3
Date: Mon, 12 Oct 2020 15:03:25 -0400	[thread overview]
Message-ID: <20201012190335.3279538-2-sashal@kernel.org> (raw)
In-Reply-To: <20201012190335.3279538-1-sashal@kernel.org>

From: Xiaoliang Yang <xiaoliang.yang_1@nxp.com>

[ Upstream commit 4ab810a4e04ab6c851007033d39c13e6d3f55110 ]

INIT_IPS and GATE_ENABLE fields have a wrong offset in SG_CONFIG_REG_3.
This register is used by stream gate control of PSFP, and it has not
been used before, because PSFP is not implemented in ocelot driver.

Signed-off-by: Xiaoliang Yang <xiaoliang.yang_1@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
 drivers/net/ethernet/mscc/ocelot_ana.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ethernet/mscc/ocelot_ana.h b/drivers/net/ethernet/mscc/ocelot_ana.h
index 841c6ec22b641..1669481d97794 100644
--- a/drivers/net/ethernet/mscc/ocelot_ana.h
+++ b/drivers/net/ethernet/mscc/ocelot_ana.h
@@ -252,10 +252,10 @@
 #define ANA_SG_CONFIG_REG_3_LIST_LENGTH_M                 GENMASK(18, 16)
 #define ANA_SG_CONFIG_REG_3_LIST_LENGTH_X(x)              (((x) & GENMASK(18, 16)) >> 16)
 #define ANA_SG_CONFIG_REG_3_GATE_ENABLE                   BIT(20)
-#define ANA_SG_CONFIG_REG_3_INIT_IPS(x)                   (((x) << 24) & GENMASK(27, 24))
-#define ANA_SG_CONFIG_REG_3_INIT_IPS_M                    GENMASK(27, 24)
-#define ANA_SG_CONFIG_REG_3_INIT_IPS_X(x)                 (((x) & GENMASK(27, 24)) >> 24)
-#define ANA_SG_CONFIG_REG_3_INIT_GATE_STATE               BIT(28)
+#define ANA_SG_CONFIG_REG_3_INIT_IPS(x)                   (((x) << 21) & GENMASK(24, 21))
+#define ANA_SG_CONFIG_REG_3_INIT_IPS_M                    GENMASK(24, 21)
+#define ANA_SG_CONFIG_REG_3_INIT_IPS_X(x)                 (((x) & GENMASK(24, 21)) >> 21)
+#define ANA_SG_CONFIG_REG_3_INIT_GATE_STATE               BIT(25)
 
 #define ANA_SG_GCL_GS_CONFIG_RSZ                          0x4
 
-- 
2.25.1


       reply	other threads:[~2020-10-12 19:07 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20201012190335.3279538-1-sashal@kernel.org>
2020-10-12 19:03 ` Sasha Levin [this message]
2020-10-12 19:03 ` [PATCH AUTOSEL 4.19 03/12] net/fsl: quieten expected MDIO access failures Sasha Levin
2020-10-12 19:03 ` [PATCH AUTOSEL 4.19 04/12] net: usb: ax88179_178a: add Toshiba usb 3.0 adapter Sasha Levin
2020-10-12 19:03 ` [PATCH AUTOSEL 4.19 05/12] net: usb: ax88179_178a: add MCT " Sasha Levin
2020-10-12 19:03 ` [PATCH AUTOSEL 4.19 06/12] via-rhine: Fix for the hardware having a reset failure after resume Sasha Levin
2020-10-12 19:03 ` [PATCH AUTOSEL 4.19 07/12] via-rhine: VTunknown1 device is really VT8251 South Bridge Sasha Levin
2020-10-12 19:03 ` [PATCH AUTOSEL 4.19 08/12] net: usb: pegasus: Proper error handing when setting pegasus' MAC address Sasha Levin
2020-10-12 19:03 ` [PATCH AUTOSEL 4.19 09/12] net: usb: rtl8150: set random MAC address when set_ethernet_addr() fails Sasha Levin
2020-10-12 19:03 ` [PATCH AUTOSEL 4.19 12/12] net: usb: qmi_wwan: add Cellient MPL200 card Sasha Levin

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